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ASoC: SOF: Intel: BYT: mask BUSY or DONE interrupts in handler#2136

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ASoC: SOF: Intel: BYT: mask BUSY or DONE interrupts in handler #2136

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46 changes: 25 additions & 21 deletions sound/soc/sof/intel/byt.c
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Original file line numberDiff line numberDiff line change
Expand Up@@ -160,13 +160,31 @@ static void byt_dump(struct snd_sof_dev *sdev, u32 flags)
static irqreturn_t byt_irq_handler(int irq, void *context)
{
struct snd_sof_dev *sdev = context;
u64 isr;
u64 ipcx, ipcd;
int ret = IRQ_NONE;

/* Interrupt arrived, check src */
isr = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_ISRX);
if (isr & (SHIM_ISRX_DONE | SHIM_ISRX_BUSY))
ipcx = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCX);
ipcd = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCD);

if (ipcx & SHIM_BYT_IPCX_DONE) {

/* reply message from DSP, Mask Done interrupt first */
snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR,
SHIM_IMRX,
SHIM_IMRX_DONE,
SHIM_IMRX_DONE);

@keyonjiekeyonjieMay 25, 2020

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If you don't check the SHIM_ISRX here, we could mask the SHIM_IMRX_DONE multiple times if a new message from DSP arrives and the previous reply message from DSP has not been thread handled yet, though this could be not harmful.

@plbossartplbossartMay 26, 2020

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SHIM_ISRX_DONE is set when LPE writes 1 in IPCX_DONE, so this is redundant/mirrorred. You cannot have different values for SHIM_ISRX_DONE and IPCX_DONE.

@keyonjiekeyonjieMay 26, 2020•
edited
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Yes, SHIM_ISRX_DONE and IPCX_DONE are set in mirrored way, but the clearing doesn't. I believe they actually could have different values, imagine this:

  1. a new host -> LPE IPC A;
  2. LPE handled A, and send reply for A to host. This will set ISRX_DONE and IPCX_DONE;
  3. Host get ISRX_DONE interrupt, unmask IMRX_DONE here and waking up the IRQ tread handler, but at this time, if
  4. LPE want to send a new IPC (e.g. tracing position update IPC) to the host, it will set ISRX_BUSY and IPCD_BUSY;
  5. Host get ISRX_BUSY interrupt, we will enter byt_irq_handler() here again but the clearing of IPCX_DONE after step 3 above (doing in the thread byt_irq_thread) may not be done yet, in this scenario, the check of "if (ipcx & SHIM_BYT_IPCX_DONE)" will be true and we will mask the SHIM_IMRX_DONE again.

@plbossartplbossartMay 26, 2020

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we never clear SHIM_ISRX_DONE and masking does not affect the values of IPXC_DONE registers, I don't understand your point at all.
Is anything broken?

@keyonjiekeyonjieMay 26, 2020

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If you add some print log as I did in #1492, and compile FW with verbose trace enabled, then running a stream, and you could see that if what I described above will happen.

@keyonjiekeyonjieMay 26, 2020

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we never clear SHIM_ISRX_DONE and masking does not affect the values of IPXC_DONE registers, I don't understand your point at all.
Is anything broken?

As I commented at the beginning, this could be not harmful so nothing should be broken by it.

@plbossartplbossartMay 26, 2020•
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@keyonjie adding a test for ISRX_DONE would not change anything in step 5, the bit would be set just like IPCX_DONE, so in this case there is no way to prevent the IMRX_DONE bit from being set.

ret = IRQ_WAKE_THREAD;
}

if (ipcd & SHIM_BYT_IPCD_BUSY) {

/* new message from DSP, Mask Busy interrupt first */
snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR,
SHIM_IMRX,
SHIM_IMRX_BUSY,
SHIM_IMRX_BUSY);
ret = IRQ_WAKE_THREAD;
}

return ret;
}
Expand All@@ -175,19 +193,12 @@ static irqreturn_t byt_irq_thread(int irq, void *context)
{
struct snd_sof_dev *sdev = context;
u64 ipcx, ipcd;
u64 imrx;

imrx = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IMRX);
ipcx = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCX);
ipcd = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCD);

/* reply message from DSP */
if (ipcx & SHIM_BYT_IPCX_DONE &&
!(imrx & SHIM_IMRX_DONE)) {
/* Mask Done interrupt before first */
snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR,
SHIM_IMRX,
SHIM_IMRX_DONE,
SHIM_IMRX_DONE);
if (ipcx & SHIM_BYT_IPCX_DONE) {

spin_lock_irq(&sdev->ipc_lock);

Expand All@@ -207,14 +218,7 @@ static irqreturn_t byt_irq_thread(int irq, void *context)
}

/* new message from DSP */
ipcd = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCD);
if (ipcd & SHIM_BYT_IPCD_BUSY &&
!(imrx & SHIM_IMRX_BUSY)) {
/* Mask Busy interrupt before return */
snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR,
SHIM_IMRX,
SHIM_IMRX_BUSY,
SHIM_IMRX_BUSY);
if (ipcd & SHIM_BYT_IPCD_BUSY) {

/* Handle messages from DSP Core */
if ((ipcd & SOF_IPC_PANIC_MAGIC_MASK) == SOF_IPC_PANIC_MAGIC) {
Expand Down