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topology: sof-apl-pcm512x: add option for codec master mode and 44.1kHz#2671

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Merged
lgirdwood merged 1 commit into from
Apr 3, 2020
Merged

topology: sof-apl-pcm512x: add option for codec master mode and 44.1kHz #2671

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4 changes: 3 additions & 1 deletion tools/topology/CMakeLists.txt
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Original file line numberDiff line numberDiff line change
Expand Up@@ -62,7 +62,9 @@ set(TPLGS
"sof-byt-codec\;sof-cht-es8316\;-DCODEC=ES8316\;-DPLATFORM=cht-codec\;-DSSP_NUM=2"
"sof-cnl-rt274\;sof-cnl-rt274"
"sof-apl-tdf8532\;sof-apl-tdf8532"
"sof-apl-pcm512x\;sof-apl-pcm512x"
"sof-apl-pcm512x\;sof-apl-pcm512x\;-DFSYNC=48000"
"sof-apl-pcm512x\;sof-apl-pcm512x-master\;-DCODEC_MASTER\;-DFSYNC=48000"
"sof-apl-pcm512x\;sof-apl-pcm512x-master-44100\;-DCODEC_MASTER\;-DFSYNC=44100"
"sof-apl-pcm512x-nohdmi\;sof-apl-pcm512x-nohdmi\;-DPPROC=volume"
"sof-apl-demux-pcm512x\;sof-apl-demux-pcm512x"
"sof-apl-rt298\;sof-apl-rt298"
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29 changes: 23 additions & 6 deletions tools/topology/sof-apl-pcm512x.m4
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Original file line numberDiff line numberDiff line change
Expand Up@@ -18,6 +18,10 @@ include(`sof/tokens.m4')
include(`platform/intel/bxt.m4')
include(`platform/intel/dmic.m4')

ifdef(`CODEC_MASTER',
define(SSP_SCHEDULE_TIME_DOMAIN, SCHEDULE_TIME_DOMAIN_DMA),
define(SSP_SCHEDULE_TIME_DOMAIN, SCHEDULE_TIME_DOMAIN_TIMER))

DEBUG_START

#
Expand All@@ -43,14 +47,14 @@ dnl time_domain, sched_comp)
PIPELINE_PCM_ADD(sof/pipe-low-latency-playback.m4,
1, 0, 2, s32le,
1000, 0, 0,
48000, 48000, 48000)
FSYNC, FSYNC, FSYNC)

# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s32le.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
6, 0, 2, s32le,
1000, 0, 0,
48000, 48000, 48000)
FSYNC, FSYNC, FSYNC)

# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le.
# 1000us deadline on core 0 with priority 0
Expand DownExpand Up@@ -101,22 +105,22 @@ dnl deadline, priority, core, time_domain)
DAI_ADD(sof/pipe-dai-playback.m4,
1, SSP, 5, SSP5-Codec,
PIPELINE_SOURCE_1, 2, s24le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
1000, 0, 0, SSP_SCHEDULE_TIME_DOMAIN)

# capture DAI is SSP5 using 2 periods
# Buffers use s16le format, 1000us deadline on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
6, SSP, 5, SSP5-Codec,
PIPELINE_SINK_6, 2, s24le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
1000, 0, 0, SSP_SCHEDULE_TIME_DOMAIN)

# Media playback pipeline 5 on PCM 4 using max 2 channels of s16le.
# Set 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-pcm-media.m4,
5, 4, 2, s16le,
1000, 0, 0,
8000, 96000, 48000,
SCHEDULE_TIME_DOMAIN_TIMER,
8000, 96000, FSYNC,
SSP_SCHEDULE_TIME_DOMAIN,
PIPELINE_PLAYBACK_SCHED_COMP_1)

# Connect pipelines together
Expand DownExpand Up@@ -178,12 +182,25 @@ PCM_CAPTURE_ADD(DMIC16kHz, 6, PIPELINE_PCM_8)

dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
#SSP 5 (ID: 0)
ifdef(`CODEC_MASTER',
`
DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, eval(FSYNC * 64), codec_master),
SSP_CLOCK(fsync, FSYNC, codec_master),
SSP_TDM(2, 32, 3, 3),
SSP_CONFIG_DATA(SSP, 5, 24)))
'
,
`
DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 3072000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 32, 3, 3),
SSP_CONFIG_DATA(SSP, 5, 24)))
'
)

# DMIC (ID: 1)
DAI_CONFIG(DMIC, 0, 1, dmic01,
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