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DMA: Fix fw panic after release on SdW platforms - #2673
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Bug was caused because sdw controller is stopped first, then DSP is stopped, so DW FIFO will never be consumed, so timeout occurs, and watch dog will reset hardware. Moreover polling for FIFO empty in duch a place should have positive result only when pause take shorten than 1ms what is not reasonable value. Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
lgirdwood
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Shouldn't the fix be stopping DMA then SDW ? What do we do with DMIC and SSP ?
slawblauciak
commented
Apr 3, 2020
@plbossart would that be a good solution to you in your eyes? I'm not entirely sure if we could guarantee correct flow if we were to do that. |
lgirdwood
commented
Apr 3, 2020
@slawblauciak@ktrzcinx we need to have something consistent and not reorder the ops depending on DAI. e.g.
Can you confirm the stop flow today. |
slawblauciak
commented
Apr 3, 2020
Thing is, the SDW controller is managed on the host side. So, this really has to be synched with kernel. |
lgirdwood
commented
Apr 3, 2020
@slawblauciak which parts of SDW are controlled by host and which are FW ? |
slawblauciak
commented
Apr 3, 2020
The entirety of SDW is controlled by host. The FW only handles the DMA. |
lgirdwood
commented
Apr 3, 2020
@slawblauciak I'm assuming DW DMA is used here ? The programming partitioning flow with host would be
|
slawblauciak
commented
Apr 3, 2020
That's right, we use DW DMA for SDW/ALH. |
lgirdwood
commented
Apr 3, 2020
@slawblauciak can you confirm the current flow like 1 - 6 above, it may mean we need to make driver and FW changes here. |
slawblauciak
commented
Apr 3, 2020
Yeah, I think that's the kind of flow we'd want here. |
plbossart
commented
Apr 3, 2020
Sorry I don't understand this entire thread. We ALREADY stop the DMA before stopping the SoundWire transfers, and that creates a pop noise. thesofproject/linux#1897 |
lgirdwood
commented
Apr 3, 2020
@plbossart so does thesofproject/linux#1897 fix the pop issue for you ? |
plbossart
commented
Apr 3, 2020
No, the RT1308 will deal with this. What it can't deal with is a sustained output to -1 as is currently the case.
I have no idea how this error happens since it's different from what is being used today. Unless this is with the python scripts? At any rate I started an Intel internal thread on the recommended programming sequence. let's not continue here until we know what direction to take. |
I haven't seen any DSP panics actually. Haven't tried to reproduce the problem so far. |
lgirdwood
commented
Apr 6, 2020
ok, then the PR title is misleading. Please align internally with @plbossart, I will close this for the moment, we can re-open once solution is agreed. |
slawblauciak
commented
Apr 6, 2020
Uhm, I believe there's a misunderstanding, this is not my PR :) |
paulstelian97
commented
Apr 6, 2020
@ktrzcinx You do still get the FW panics right? If so please reopen if this is the fix you want to go forward with. |
RanderWang
commented
Apr 9, 2020
the DSP panic is caused by FW for thesofproject/linux#1897 |
lgirdwood
commented
Apr 9, 2020
@RanderWang please provide more logs, I dont see a panic above. I only see that we cannot release a DMA channel. Please discuss internally with @plbossart |
tlauda
commented
Apr 9, 2020
This code for sure causes agent panic. Such long wait shouldn't be done with interrupts disabled. Every timeout will kill DSP immediately. I don't understand why we're trying to close this. |
lgirdwood
commented
Apr 9, 2020
@tlauda it was closed until internal alignment. |
@lgirdwood Pierre, @slawblauciak and me got a conclusion that we need to change the start/stop sequence for sdw. With the sequence of HDA was changed (just tested HDA, not changed. But HDA doesn't use GP-DMA), QA also reported DSP panic. All the kernel or FW logs are at https://sof-ci.01.org/linuxpr/PR1897/build3520/devicetest/CML_RVP_SDW/check-pause-resume-playback-10/ |
lgirdwood
commented
Apr 9, 2020
@RanderWang I've not seen any internal alignment. Please make sure I am on any email alongside @plbossart and @lbetlej . |
RanderWang
commented
Apr 14, 2020
@lgirdwood we discussed int microsoft team. please check the picture (edited) |
lgirdwood
commented
Apr 15, 2020
@RanderWang this make no sense, it's unreadable. |
plbossart
commented
Apr 15, 2020
@lgirdwood the sequence used so far for SoundWire is broken and there's consensus to change it. thesofproject/linux#1897 was updated to use the same sequence for all DAIs, and keep the weird sequence for HDAudio - we still don't have a clue about the firmware underflows and panic issues for the HDaudio link DMA. |
ktrzcinx
commented
Apr 17, 2020
@lgirdwood As I know FIFO should be cleared after disabling DMA enable bit, what is going to be done in |
lgirdwood
commented
Apr 17, 2020
SOFCI TEST |
lgirdwood
commented
Apr 20, 2020
@xiulipan I guess Jenkins is back now ? Do we need to restart CI ? |
xiulipan
commented
Apr 20, 2020
@lgirdwood I think for this PR, we may need to restart the test. |
xiulipan
commented
Apr 20, 2020
SOFCI TEST |
lgirdwood
commented
Apr 21, 2020
CI known issues. |

Bug was caused because sdw controller is stopped first,
then DSP is stopped, so DW FIFO will never be consumed,
so timeout occurs, and watch dog will reset hardware.
Moreover polling for FIFO emty in duch a place should have positive
result only when pause take shorten than 1ms what is not
reasonable value.
Signed-off-by: Karol Trzcinski karolx.trzcinski@linux.intel.com