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7 changes: 2 additions & 5 deletions src/drivers/mediatek/CMakeLists.txt
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,9 @@
# SPDX-License-Identifier: BSD-3-Clause

add_subdirectory(afe)
if(CONFIG_MT8195)
add_subdirectory(mt8195)
endif()
if(CONFIG_MT8186)
add_subdirectory(mt818x)
add_subdirectory(mt8186)
endif()
if(CONFIG_MT8188)
if(CONFIG_MT8186 OR CONFIG_MT8188)
add_subdirectory(mt818x)
endif()
12 changes: 12 additions & 0 deletions src/drivers/mediatek/afe/CMakeLists.txt
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
# SPDX-License-Identifier: BSD-3-Clause

add_local_sources(sof afe-memif.c afe-dai.c afe-drv.c)
if(CONFIG_MT8186)
add_subdirectory(mt8186)
endif()
if(CONFIG_MT8188)
add_subdirectory(mt8188)
endif()
if(CONFIG_MT8195)
add_subdirectory(mt8195)
endif()
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright(c) 2022 MediaTek. All rights reserved.
* Copyright(c) 2023 MediaTek. All rights reserved.
*
* Author: Bo Pan <bo.pan@mediatek.com>
* YC Hung <yc.hung@mediatek.com>
* Chunxu Li <chunxu.li@mediatek.com>
* Trevor Wu <trevor.wu@mediatek.com>
*/

#include <sof/audio/component.h>
Expand All@@ -22,9 +24,9 @@
#include <stddef.h>
#include <stdint.h>

/* ef8bd339-3aa5-4314-a06b-1339e3dec821 */
DECLARE_SOF_UUID("afe-dai", afe_dai_uuid, 0xef8bd339, 0x3aa5, 0x4314,
0xa0, 0x6b, 0x13, 0x39, 0xe3, 0xde, 0xc8, 0x21);
/* 30290c76-6a05-4784-8464-c21f09cee87e */
DECLARE_SOF_UUID("afe-dai", afe_dai_uuid, 0x30290c76, 0x6a05, 0x4784,
0x84, 0x64, 0xc2, 0x1f, 0x09, 0xce, 0xe8, 0x7e);

DECLARE_TR_CTX(afe_dai_tr, SOF_UUID(afe_dai_uuid), LOG_LEVEL_INFO);

Expand Down
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright(c) 2022 MediaTek. All rights reserved.
* Copyright(c) 2023 MediaTek. All rights reserved.
*
* Author: Bo Pan <bo.pan@mediatek.com>
* YC Hung <yc.hung@mediatek.com>
* Chunxu Li <chunxu.li@mediatek.com>
* Trevor Wu <trevor.wu@mediatek.com>
*/

#include <sof/common.h>
Expand All@@ -24,9 +26,8 @@ static struct mtk_base_afe mtk_afe;
#define printf(format, ...)
#endif

/* 21448a3f-c054-41b3-8d9e-b7619a93c27b */
DECLARE_SOF_UUID("afedrv", afedrv_uuid, 0x21448a3f, 0xc054, 0x41b3,
0x8d, 0x9e, 0xb7, 0x61, 0x9a, 0x93, 0xc2, 0x7b);
DECLARE_SOF_UUID("afedrv", afedrv_uuid, 0x4e8f16d1, 0xe935, 0x41f4,
0xb9, 0x9e, 0x42, 0xc5, 0x7e, 0x74, 0x57, 0x84);

DECLARE_TR_CTX(afedrv_tr, SOF_UUID(afedrv_uuid), LOG_LEVEL_INFO);

Expand DownExpand Up@@ -54,29 +55,31 @@ static int afe_memif_set_channel(struct mtk_base_afe *afe, int id, unsigned int
struct mtk_base_afe_memif *memif = &afe->memif[id];
unsigned int mono;

if (memif->data->mono_shift < 0)
return 0;

if (memif->data->ch_num_reg >= 0) {
afe_reg_update_bits(afe, memif->data->ch_num_reg,
memif->data->ch_num_maskbit << memif->data->ch_num_shift,
channel << memif->data->ch_num_shift);
}

if (memif->data->quad_ch_mask) {
unsigned int quad_ch = 0;

if (channel == 4)
quad_ch = 1;
unsigned int quad_ch = (channel == 4);

afe_reg_update_bits(afe, memif->data->quad_ch_reg,
memif->data->quad_ch_mask << memif->data->quad_ch_shift,
quad_ch << memif->data->quad_ch_shift);
}

mono = (bool)memif->data->mono_invert ^ (channel == 1);
afe_reg_update_bits(afe, memif->data->mono_reg, 1 << memif->data->mono_shift,
mono << memif->data->mono_shift);

if (memif->data->int_odd_flag_reg > 0)
afe_reg_update_bits(afe, memif->data->int_odd_flag_reg,
1 << memif->data->int_odd_flag_shift,
mono << memif->data->int_odd_flag_shift);

if (memif->data->mono_reg > 0 && memif->data->mono_shift >= 0)
afe_reg_update_bits(afe, memif->data->mono_reg,
1 << memif->data->mono_shift,
mono << memif->data->mono_shift);
return 0;
}

Expand DownExpand Up@@ -163,7 +166,7 @@ int afe_memif_set_addr(struct mtk_base_afe *afe, int id, unsigned int dma_addr,

memif->afe_addr = phys_buf_addr;
memif->buffer_size = dma_bytes;
tr_dbg(&afedrv_tr, "dma_addr:%u, size:%u\n", dma_addr, dma_bytes);
tr_dbg(&afedrv_tr, "dma_addr:0x%x, size:%u\n", dma_addr, dma_bytes);
/* start */
afe_reg_write(afe, memif->data->reg_ofs_base, phys_buf_addr);
/* end */
Expand All@@ -180,12 +183,12 @@ int afe_memif_set_addr(struct mtk_base_afe *afe, int id, unsigned int dma_addr,
}

/* set MSB to 33-bit */
if (memif->data->msb_reg >= 0)
if (memif->data->msb_reg > 0)
afe_reg_update_bits(afe, memif->data->msb_reg, 1 << memif->data->msb_shift,
msb_at_bit33 << memif->data->msb_shift);

/* set MSB to 33-bit, for memif end address */
if (memif->data->msb2_reg >= 0)
if (memif->data->msb2_reg > 0)
afe_reg_update_bits(afe, memif->data->msb2_reg, 1 << memif->data->msb2_shift,
msb_at_bit33 << memif->data->msb2_shift);

Expand Down
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