Skip to content

cavs: memory bank powerup flow adjustment#7065

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
lgirdwood merged 1 commit into from
Feb 13, 2023
Merged

cavs: memory bank powerup flow adjustment #7065

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
17 changes: 11 additions & 6 deletions src/platform/intel/cavs/include/cavs/lib/pm_memory.h
View file
Open in desktop
Original file line numberDiff line numberDiff line change
Expand Up@@ -72,17 +72,22 @@ static inline void cavs_pm_memory_hp_sram_mask_set(uint32_t mask, int segment,
{
uint32_t expected = enabled ? 0 : mask;
uint32_t delay = 0;
uint32_t i;

io_reg_update_bits(SHIM_HSPGCTL(segment), mask, enabled ? 0 : mask);
io_reg_update_bits(SHIM_HSRMCTL(segment), mask, enabled ? 0 : mask);

idelay(MEMORY_POWER_CHANGE_DELAY);

while ((io_reg_read(SHIM_HSPGISTS(segment)) & mask) != expected) {
/* Double check of PG status needed to confirm EBB readiness */
for (i = 0; i < 2; i++) {
idelay(MEMORY_POWER_CHANGE_DELAY);
delay += MEMORY_POWER_CHANGE_DELAY;
if (delay >= MEMORY_POWER_CHANGE_TIMEOUT)
platform_panic(SOF_IPC_PANIC_MEM);

while ((io_reg_read(SHIM_HSPGISTS(segment)) & mask) != expected) {
idelay(MEMORY_POWER_CHANGE_DELAY);
delay += MEMORY_POWER_CHANGE_DELAY;
if (delay >= MEMORY_POWER_CHANGE_TIMEOUT)
platform_panic(SOF_IPC_PANIC_MEM);
}
delay = 0;

@lyakhlyakhFeb 10, 2023

Copy link
Copy Markdown
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

not sure I understand. Does this mean, that once we successfully identified the register value to match what we expect, it can change and we have to run the loop again to catch a second such change? Or do we just have to

idelay();
while (io_reg_read() != expected)
idelay();
idelay();
io_reg_read();

? If this is the case, I wouldn't use a loop there but just add that additional register read (possibly with a delay) after the loop.

@cujomalaineycujomalaineyFeb 10, 2023

Copy link
Copy Markdown
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

regarding your recommendation, is that not what the outer loop enforces?

}
}

Expand Down