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Documents
Documents
ForthCPU_tcr.dir
ForthCPU_tcr.dir
RAM
RAM
UART
UART
addressBusController
addressBusController
addressMonitors
addressMonitors
alu
alu
aluB
aluB
aluGroupDecoder
aluGroupDecoder
asmTests
asmTests
bootROM
bootROM
branchLogic
branchLogic
busController
busController
busInterface
busInterface
core
core
coreWithDebug/source
coreWithDebug/source
dataBusController
dataBusController
dataSourcesController
dataSourcesController
debugPort
debugPort
debugPortV2
debugPortV2
debugSnooper
debugSnooper
debugWatcher
debugWatcher
debuggerTests
debuggerTests
design_notes
design_notes
devBoard
devBoard
ecp5u
ecp5u
example_tests
example_tests
generalGroupDecoder
generalGroupDecoder
generics
generics
impl1
impl1
instructionLatch
instructionLatch
instructionLatchV2/source
instructionLatchV2/source
instructionPhaseDecoder
instructionPhaseDecoder
interruptLogic
interruptLogic
jumpGroupDecoder
jumpGroupDecoder
loadStoreGroupDecoder
loadStoreGroupDecoder
machxo3l
machxo3l
machxo3l_vlg
machxo3l_vlg
masterSequencer
masterSequencer
mcuResources
mcuResources
mcuTestbench
mcuTestbench
memory
memory
memoryMapper
memoryMapper
opxMultiplexer
opxMultiplexer
pmi_work
pmi_work
postRoute
postRoute
processorCore
processorCore
programCounter
programCounter
registerFile
registerFile
registerFileB
registerFileB
registerSequencer
registerSequencer
timingModel
timingModel
.floorplanner.ini
.floorplanner.ini
.gitignore
.gitignore
.recovery
.recovery
.run_manager.ini
.run_manager.ini
.setting.ini
.setting.ini
.spread_sheet.ini
.spread_sheet.ini
.spreadsheet_view.ini
.spreadsheet_view.ini
ForthCPU.ccl
ForthCPU.ccl
ForthCPU.ldf
ForthCPU.ldf
ForthCPU.lpf
ForthCPU.lpf
ForthCPU.sort
ForthCPU.sort
ForthCPU1.sty
ForthCPU1.sty
ForthCPU_tcl.html
ForthCPU_tcl.html
_math_real.vhd
_math_real.vhd
constants.v
constants.v
constants.vhd
constants.vhd
core.lst
core.lst
core.tfi
core.tfi
core_tf.v
core_tf.v
debuggerTestSetup.v
debuggerTestSetup.v
ecp5u.f
ecp5u.f
ecp5u.log
ecp5u.log
generate_core.tcl
generate_core.tcl
generate_ngd.tcl
generate_ngd.tcl
hdle_generate_Symbol.tcl
hdle_generate_Symbol.tcl
hdle_generate_tbdeclaration.tcl
hdle_generate_tbdeclaration.tcl
hdle_generate_tbtemplate.tcl
hdle_generate_tbtemplate.tcl
hmm.vhd
hmm.vhd
instructionTestSetup.sv
instructionTestSetup.sv
instructionTestSetup.v
instructionTestSetup.v
machxo3l.log
machxo3l.log
machxo3l_vlg.f
machxo3l_vlg.f
machxo3l_vlg.log
machxo3l_vlg.log
master.wdl
master.wdl
msg_file.log
msg_file.log
pgm.xcf
pgm.xcf
piodrc.cfg
piodrc.cfg
pll.edn
pll.edn
pll.ipx
pll.ipx
pll.lpc
pll.lpc
pll.naf
pll.naf
pll.sort
pll.sort
pll.srp
pll.srp
pll.sym
pll.sym
pll.v
pll.v
pll_generate.log
pll_generate.log
pll_tmpl.v
pll_tmpl.v
pmi_work.f
pmi_work.f

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FPGA Implementation of a CPU optimised for running my Forth

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