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1. continue_with_svcontinue_with_svPublic

   Software and resources to help Purdue students (and others) continue developing with SystemVerilog after losing access to proprietary tools.

   Makefile 17 2

2. caravel_user_projectcaravel_user_projectPublic

   Forked from efabless/caravel_user_project

   https://caravel-user-project.readthedocs.io

   Verilog 3 1

3. PurdueElectricRacing/LapSimPurdueElectricRacing/LapSimPublic

   Lap Simulation in Matlab

   MATLAB 4 1

4. ASCON_code-a-chipASCON_code-a-chipPublic

   ASCON implementation for IEEE SSCS Code a Chip

   Jupyter Notebook

5. 270Computer270ComputerPublic

   Generate UART output code from plain text file

   C 1

6. OpenDTOpenDTPublic

   Simple FSAE Electric Drivetrain Design Tool

   Python 6