feat(crypto): nistcurves v0.5.0 + FP_ONCHIP_MUL turbo profile — 47.5 s handshake @64 MHz - #60
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Bump libs/nistcurves v0.3.0 -> v0.5.0 and wire the FP_ONCHIP_MUL turbo profile (upstream issue #69) behind USE_NISTCURVES_ONCHIP=1: - wrapper: profile arg (reu|onchip); dynamic member list (v0.5.0 renamed/added archive members); onchip mode rebuilds mul_8x8_onchip.o with the SHARED_* consumer defines + LIB_SHARED_SQTAB_BASE=$BC00 via a generated glue TU (upstream's SHARED_CT_MUL_8X8 x FP_ONCHIP_MUL combo lacks .imports — composition bridge, no libs/ source patch) - poly1305.s: under the flag, provide the c64-lib-contract §8.3 canonical ct_mul_8x8 (+ SMC bake sites) with the legacy A=a/X=b mul_8x8 kept as a thin shim; default build byte-path unchanged - data.s: yield sqtab_lo/hi to the lib's $BC00 equates under the flag (aligned same-size placeholder keeps TABLES_BSS layout; post-link Makefile check asserts sqtab_reserved==$BC00) - boot.s: skip the ~128 KB reu_mul_init population + yield the reu_fetch_mul_row export under the flag (onchip verify issues no REU row DMA; boot obligation shrinks to sqtab_init) - cfg/uci: LIB_NISTCURVES_MUL_CODE -> CRYPTO_OVERLAY (onchip fp256 growth overflows CRYPTO_HOT by 59 B otherwise); Makefile guards the flag against X25519_SIBLING + both overlay-embed flags Correctness: VICE KAT oracle 3/3 PASS against the onchip UCI PRG (CAVP SigVer vectors). Default UCI build: byte-identical behavior, 0 warnings. KNOWN: plain ip65 does not link at either pin (BSS overflows CRYPTO_COLD_SHADOW by 1662 B @ v0.3.0, 1406 B @ v0.5.0) — pre-existing on master since PR #55, improved-but-not-fixed by this bump; tracked at c64-nist-curves#54. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01UZmMaxyyykvYbCvJAc4QVW
Controlled A/B on C64U hardware (2026-07-20): an onchip-profile boot that issues no REU DMA loses the first UCI TCP_CONNECT at the FPGA bridge (command accepted, no error bit, DATA_AV never asserts, no SYN on the wire) — 0/8 e2e attempts across the day. The identical build with reu_mul_init retained passes 3/3 (47.0-47.8 s @ 64 MHz), and an interleaved re-run of the REU-quiet build still fails 0/2 in the same window. Boot-time REU traffic evidently settles shared expansion-I/O state the UCI bridge depends on. Cost: ~1 s of boot; REU banks 0/1 population is otherwise unused under the onchip profile. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01UZmMaxyyykvYbCvJAc4QVW
Full 4-point clock sweeps on the C64U for v0.3.0-REU / v0.5.0-REU / v0.5.0-onchip: REU floor is ~42 s (supersedes the ill-conditioned 2-point 28.4 s figure), onchip floor 2.5 s, measured crossover ~34 MHz with an in-band bracket at 32 MHz. HTTPS e2e: 59.9 s @48 / 47.5 s @64 under the onchip profile — first sub-50 s handshake. Adds the USE_NISTCURVES_ONCHIP build flag docs and the C64U REU-quiet-boot connect quirk (c64-test-harness#137). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01UZmMaxyyykvYbCvJAc4QVW
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Consumes c64-nist-curves v0.5.0's
FP_ONCHIP_MULturbo profile (upstream issue #69, filed from this repo's scaling analysis) behindUSE_NISTCURVES_ONCHIP=1, and lands the full benchmark campaign.Campaign results (C64 Ultimate, 4-point fits, residuals ≤4.1%)
Integration
reu|onchipprofile arg + dynamic archive member list; onchip mode rebuildsmul_8x8_onchip.owith the SPEC §8.1/§8.3 consumer-shared defines via a generated glue TU (upstream'sFP_ONCHIP_MUL×SHARED_CT_MUL_8X8guard combo lacks.imports — composition bridge, libs/ untouched; upstream issue candidate).poly1305.sprovides the §8.3 canonicalct_mul_8x8+ SMC bake sites under the flag (legacymul_8x8A/X shim kept);data.syields sqtab to the lib's $BC00 equates with a post-link drift check;MUL_CODE→CRYPTO_OVERLAY(mutually exclusive with the overlay-embed flags).boot.sretainsreu_mul_initunder both profiles — C64U quirk found during the campaign: a REU-quiet boot drops the first UCI TCP_CONNECT at the FPGA bridge (0/8 e2e vs 3/3 with it retained, interleaved control; c64-test-harness#137).Correctness
Known / pre-existing
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