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1. riscv-dvriscv-dvPublic

   Forked from chipsalliance/riscv-dv

   SV/UVM based instruction generator for RISC-V processor verification

   Python 1 1

2. openhwgroup/cv32e40popenhwgroup/cv32e40pPublic

   CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

   SystemVerilog 1.3k 546

3. openhwgroup/core-v-verifopenhwgroup/core-v-verifPublic

   Functional verification project for the CORE-V family of RISC-V cores.

   Assembly 710 323

4. openhwgroup/programsopenhwgroup/programsPublic

   Documentation for the OpenHW Group's set of CORE-V RISC-V cores

   HTML 230 98