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Generated Liberty sets input-pin max_transition (0.04 ns) below the PDK's achievable slew

Status: Open.

#298In VLSIDA/OpenRAM;

· cpehle opened on Jul 17, 2026

Incorrect internal_power values in generated SKY130 Liberty files

Status: Open.

#294In VLSIDA/OpenRAM;

· Blueonics opened on Apr 30, 2026

LVS mismatch errors with Sky130 PDK

Status: Open.

#292In VLSIDA/OpenRAM;

· gumnaam2 opened on Apr 19, 2026

sky130 PEX fails due to missing storage node labels in bitcell_2port

Status: Open.

#281In VLSIDA/OpenRAM;

· DashCodeHub opened on Feb 2, 2026

For sky130, in the generated .lef file, the value of 'DATABASE MICRONS' is wrong.

Status: Open.

#278In VLSIDA/OpenRAM;

· ManzoniGiuseppe opened on Dec 16, 2025

FreePDK45 Control Logic Timing - Glitches or Expected Behavior?

Status: Open.

#276In VLSIDA/OpenRAM;

· buchtawill opened on Oct 18, 2025

Sense amp enable timing error when generating 1 Kb (1024 bits) SRAM — requires manual delay chain adjustment

Status: Open.

#274In VLSIDA/OpenRAM;

· cyberxcodes opened on Oct 16, 2025

ImportError: Missing 'lef_rom_interconnect' in stable version's OpenRAM tech module

Status: Open.

#273In VLSIDA/OpenRAM;

· OsFlora opened on Aug 18, 2025

Please consider switching from volare to ciel

Status: Open.

#269In VLSIDA/OpenRAM;

· hpretl opened on Jun 26, 2025

Generating SRAM fails at supply_router: Couldn't route from (vdd layer=m3 ...) to to (vdd layer=m3 ...)

Status: Open.

#268In VLSIDA/OpenRAM;

· kammoh opened on May 14, 2025

Documentation clarifications in basic_usage and basic_setup

Status: Open.

#262In VLSIDA/OpenRAM;

· sampollard opened on Feb 26, 2025

macro - <ROM instance> does not contain any shapes or vias

Status: Open.

#254In VLSIDA/OpenRAM;

· tvd040562 opened on Sep 24, 2024