[Wasm RyuJit] Enable Hardware Intrinsics by adamperlin · Pull Request #129201 · dotnet/runtime

adamperlin · 2026-06-10T01:10:20Z

This is a follow up to #129140, so there is some duplicated diff. This PR enables FEATURE_SIMD and FEATURE_HW_INTRINSICS for TARGET_WASM and stubs out the minimal necessary pieces of implementation using a new NYI_WASM_SIMD macro and associated JitOption, NyiWasmSimdToR2RUnsupported to prevent crossgen failures due to the presence of intrinsics.

There are a few patterns that showed up commonly which required many ifdef adjustments:

Assuming !TARGET_XARCH -> TARGET_ARM64 if hardware intrinsics are enabled (not the case anymore with wasm)
Assuming FEATURE_HW_INTRINSICS -> FEATURE_MASKED_HW_INTRINSICS (not the case either for Wasm, as Wasm doesn't have any kind of mask register).

Stub HARDWARE_INTRINSIC definitions were added for quite a few xplat Vector128 operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with FEATURE_HARDWARE_INTRINSICS in many places.

…SICS

…s, masked hw intrinsics assumptions

…_HW_INTRINSICS

…tor128 instruction set

…-simd-skeleton

…b during build

…ion during product build

…asm.h and try and make argument counts correct

Copilot

Pull request overview

This PR wires up WebAssembly (Wasm32) support for CoreCLR JIT hardware intrinsics/SIMD at the infrastructure level: new instruction set definitions, JIT/EE interface plumbing, and Wasm-specific stubs/NYI paths to keep R2R/crossgen from failing while the implementation is still incomplete.

Changes:

Add Wasm32 instruction set + ReadyToRun instruction set definitions (WasmBase, PackedSimd, Vector128) and propagate them through the JIT interface/tooling.
Enable FEATURE_SIMD/FEATURE_HW_INTRINSICS for the standalone Wasm JIT build and add initial Wasm-specific HWIntrinsic plumbing (import/lower/codegen stubs and intrinsic lists).
Introduce NYI_WASM_SIMD + a new JitConfig switch and ensure wasm crossgen uses it to convert NYIs into R2R-unsupported skips.

Reviewed changes

Copilot reviewed 32 out of 32 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs	Maps `Wasm32` to `TARGET_WASM` for generated native ifdefs.
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt	Adds Wasm32 ISA definitions and R2R bits for WasmBase/PackedSimd.
src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs	Adds Wasm32 instruction sets and implication expansion in managed JIT interface helpers.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs	Maps Wasm32 instruction sets to R2R instruction set enums.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs	Adds new R2R enum values for WasmBase/PackedSimd.
src/coreclr/jit/valuenumfuncs.h	Includes Wasm HWIntrinsic VN function defs and defines the HWIntrinsic VN range for Wasm.
src/coreclr/jit/valuenum.cpp	Gates masked-intrinsic VN evaluation/constant folding and adjusts ISA-specific handling for Wasm.
src/coreclr/jit/targetwasm.h	Updates Wasm SIMD register sizing/ABI constants and defines SIMD-related feature macros.
src/coreclr/jit/regset.h	Allows SIMD temp sizing to use FP/SIMD register size on Wasm.
src/coreclr/jit/registeropswasm.cpp	Maps SIMD types to Wasm `v128` and treats v128 as a valid “float” reg kind.
src/coreclr/jit/namedintrinsiclist.h	Adds Wasm HWIntrinsic list inclusion to populate NI_* for Wasm.
src/coreclr/jit/morph.cpp	Adds Wasm NYI stubs and gates masked-intrinsics-specific morphing logic.
src/coreclr/jit/lowerwasm.cpp	Adds Wasm lowering/containment NYI hooks for HWIntrinsic nodes.
src/coreclr/jit/jitconfigvalues.h	Adds `JitWasmSimdNyiToR2RUnsupported` config knob.
src/coreclr/jit/importercalls.cpp	Adjusts intrinsic namespace matching for Wasm and prevents some HWIntrinsic paths on Wasm.
src/coreclr/jit/hwintrinsicwasm.cpp	New Wasm HWIntrinsic helper stubs (lookup ISA, immediates, special imports).
src/coreclr/jit/hwintrinsiclistwasm.h	New Wasm HWIntrinsic list (initial Vector128 cross-platform surface, mostly stubbed).
src/coreclr/jit/hwintrinsiccodegenwasm.cpp	New Wasm HWIntrinsic codegen entrypoint stub.
src/coreclr/jit/hwintrinsic.h	Adds Wasm HWIntrinsic categories/flags and integrates them into common helpers.
src/coreclr/jit/hwintrinsic.cpp	Adds Wasm HWIntrinsic info array + ISA range array entry (currently incomplete).
src/coreclr/jit/gentree.cpp	Adjusts node sizing for Wasm HWIntrinsic nodes and gates masked-intrinsics helpers.
src/coreclr/jit/error.h	Introduces `NYI_WASM_SIMD` macro behavior with R2R-unsupported option.
src/coreclr/jit/compiler.h	Gates masked-intrinsic-only helpers and enables vector-length helpers for Wasm.
src/coreclr/jit/codegenlinear.cpp	Enables multi-op consume logic for Wasm by shifting `#ifndef TARGET_WASM` region.
src/coreclr/jit/codegen.h	Restricts mask-constant overload to masked-intrinsics builds.
src/coreclr/jit/CMakeLists.txt	Enables SIMD/HWIntrinsic defines for Wasm standalone JIT build + adds new Wasm sources.
src/coreclr/jit/assertionprop.cpp	Notes Wasm TODOs for CTZ/CLZ range reasoning.
src/coreclr/jit/abi.cpp	Treats 12-byte FP segments as SIMD register types on Wasm when SIMD enabled.
src/coreclr/inc/readytoruninstructionset.h	Adds native R2R instruction set enum values for WasmBase/PackedSimd.
src/coreclr/inc/jiteeversionguid.h	Updates JIT/EE interface GUID due to instruction set contract changes.
src/coreclr/inc/corinfoinstructionset.h	Adds Wasm CORINFO instruction set enum values and implication validity rules.
src/coreclr/crossgen-corelib.proj	Passes the new SIMD NYI-to-R2R-unsupported config option for wasm crossgen.

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

Copilot

Copilot encountered an error and was unable to review this pull request. You can try again by re-requesting a review.

…for Wasm for the time being

…/runtime into adamperlin/wasm-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 32 out of 32 changed files in this pull request and generated 5 comments.

…-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/abi.cpp:131

For Size==12 (Vector3 / TYP_SIMD12), this currently falls through to case 16 and returns TYP_SIMD16. That contradicts the comment for GetRegisterType (“smallest type larger or equal to Size”) and can lose the distinction between SIMD12 vs SIMD16 in later handling (SIMD12 has special casing in multiple backends).

#if defined(FEATURE_SIMD) && defined(TARGET_WASM)
case 12:
#endif
#ifdef FEATURE_SIMD
case 16:
return TYP_SIMD16;
#endif

…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/valuenum.cpp:8359

This switch (ni) case body is no longer properly guarded for TARGET_WASM: the case NI_ArmBase_LeadingZeroCount / case NI_AVX2_LeadingZeroCount labels are removed by the preprocessor, but the { ... return ... } block is still compiled as an unlabeled statement inside the switch. It's currently unreachable, but it's brittle and could become reachable via fallthrough, and it makes the switch structure incorrect for Wasm builds.

#if defined(TARGET_ARM64)
case NI_ArmBase_LeadingZeroCount:
#elif defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
#endif
{
assert(!varTypeIsSmall(type) && !varTypeIsLong(type));

adamperlin · 2026-06-16T15:51:08Z

/ba-g infra failures

adamperlin · 2026-06-16T15:54:15Z

@AndyAyersMS Can you take another look? I've made some pushes since the last review since I had to adjust superpmi collection and replay due to the presence of the new NyiWasmSimd option.

dotnet-policy-service · 2026-06-17T08:18:44Z

Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
See info in area-owners.md if you want to be subscribed.

This is a follow up to #129140, so there is some duplicated diff. This PR enables `FEATURE_SIMD` and `FEATURE_HW_INTRINSICS` for `TARGET_WASM` and stubs out the minimal necessary pieces of implementation using a new `NYI_WASM_SIMD` macro and associated JitOption, `NyiWasmSimdToR2RUnsupported` to prevent crossgen failures due to the presence of intrinsics. There are a few patterns that showed up commonly which required many ifdef adjustments: 1. Assuming `!TARGET_XARCH` -> `TARGET_ARM64` if hardware intrinsics are enabled (not the case anymore with wasm) 2. Assuming `FEATURE_HW_INTRINSICS` -> `FEATURE_MASKED_HW_INTRINSICS` (not the case either for Wasm, as Wasm doesn't have any kind of mask register). Stub `HARDWARE_INTRINSIC` definitions were added for quite a few xplat `Vector128` operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with `FEATURE_HARDWARE_INTRINSICS` in many places. --------- Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

adamperlin · 2026-06-10T01:10:20Z

This is a follow up to #129140, so there is some duplicated diff. This PR enables FEATURE_SIMD and FEATURE_HW_INTRINSICS for TARGET_WASM and stubs out the minimal necessary pieces of implementation using a new NYI_WASM_SIMD macro and associated JitOption, NyiWasmSimdToR2RUnsupported to prevent crossgen failures due to the presence of intrinsics.

There are a few patterns that showed up commonly which required many ifdef adjustments:

Assuming !TARGET_XARCH -> TARGET_ARM64 if hardware intrinsics are enabled (not the case anymore with wasm)
Assuming FEATURE_HW_INTRINSICS -> FEATURE_MASKED_HW_INTRINSICS (not the case either for Wasm, as Wasm doesn't have any kind of mask register).

Stub HARDWARE_INTRINSIC definitions were added for quite a few xplat Vector128 operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with FEATURE_HARDWARE_INTRINSICS in many places.

…SICS

…s, masked hw intrinsics assumptions

…_HW_INTRINSICS

…tor128 instruction set

…-simd-skeleton

…b during build

…ion during product build

…asm.h and try and make argument counts correct

Copilot

Pull request overview

This PR wires up WebAssembly (Wasm32) support for CoreCLR JIT hardware intrinsics/SIMD at the infrastructure level: new instruction set definitions, JIT/EE interface plumbing, and Wasm-specific stubs/NYI paths to keep R2R/crossgen from failing while the implementation is still incomplete.

Changes:

Add Wasm32 instruction set + ReadyToRun instruction set definitions (WasmBase, PackedSimd, Vector128) and propagate them through the JIT interface/tooling.
Enable FEATURE_SIMD/FEATURE_HW_INTRINSICS for the standalone Wasm JIT build and add initial Wasm-specific HWIntrinsic plumbing (import/lower/codegen stubs and intrinsic lists).
Introduce NYI_WASM_SIMD + a new JitConfig switch and ensure wasm crossgen uses it to convert NYIs into R2R-unsupported skips.

Reviewed changes

Copilot reviewed 32 out of 32 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs	Maps `Wasm32` to `TARGET_WASM` for generated native ifdefs.
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt	Adds Wasm32 ISA definitions and R2R bits for WasmBase/PackedSimd.
src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs	Adds Wasm32 instruction sets and implication expansion in managed JIT interface helpers.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs	Maps Wasm32 instruction sets to R2R instruction set enums.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs	Adds new R2R enum values for WasmBase/PackedSimd.
src/coreclr/jit/valuenumfuncs.h	Includes Wasm HWIntrinsic VN function defs and defines the HWIntrinsic VN range for Wasm.
src/coreclr/jit/valuenum.cpp	Gates masked-intrinsic VN evaluation/constant folding and adjusts ISA-specific handling for Wasm.
src/coreclr/jit/targetwasm.h	Updates Wasm SIMD register sizing/ABI constants and defines SIMD-related feature macros.
src/coreclr/jit/regset.h	Allows SIMD temp sizing to use FP/SIMD register size on Wasm.
src/coreclr/jit/registeropswasm.cpp	Maps SIMD types to Wasm `v128` and treats v128 as a valid “float” reg kind.
src/coreclr/jit/namedintrinsiclist.h	Adds Wasm HWIntrinsic list inclusion to populate NI_* for Wasm.
src/coreclr/jit/morph.cpp	Adds Wasm NYI stubs and gates masked-intrinsics-specific morphing logic.
src/coreclr/jit/lowerwasm.cpp	Adds Wasm lowering/containment NYI hooks for HWIntrinsic nodes.
src/coreclr/jit/jitconfigvalues.h	Adds `JitWasmSimdNyiToR2RUnsupported` config knob.
src/coreclr/jit/importercalls.cpp	Adjusts intrinsic namespace matching for Wasm and prevents some HWIntrinsic paths on Wasm.
src/coreclr/jit/hwintrinsicwasm.cpp	New Wasm HWIntrinsic helper stubs (lookup ISA, immediates, special imports).
src/coreclr/jit/hwintrinsiclistwasm.h	New Wasm HWIntrinsic list (initial Vector128 cross-platform surface, mostly stubbed).
src/coreclr/jit/hwintrinsiccodegenwasm.cpp	New Wasm HWIntrinsic codegen entrypoint stub.
src/coreclr/jit/hwintrinsic.h	Adds Wasm HWIntrinsic categories/flags and integrates them into common helpers.
src/coreclr/jit/hwintrinsic.cpp	Adds Wasm HWIntrinsic info array + ISA range array entry (currently incomplete).
src/coreclr/jit/gentree.cpp	Adjusts node sizing for Wasm HWIntrinsic nodes and gates masked-intrinsics helpers.
src/coreclr/jit/error.h	Introduces `NYI_WASM_SIMD` macro behavior with R2R-unsupported option.
src/coreclr/jit/compiler.h	Gates masked-intrinsic-only helpers and enables vector-length helpers for Wasm.
src/coreclr/jit/codegenlinear.cpp	Enables multi-op consume logic for Wasm by shifting `#ifndef TARGET_WASM` region.
src/coreclr/jit/codegen.h	Restricts mask-constant overload to masked-intrinsics builds.
src/coreclr/jit/CMakeLists.txt	Enables SIMD/HWIntrinsic defines for Wasm standalone JIT build + adds new Wasm sources.
src/coreclr/jit/assertionprop.cpp	Notes Wasm TODOs for CTZ/CLZ range reasoning.
src/coreclr/jit/abi.cpp	Treats 12-byte FP segments as SIMD register types on Wasm when SIMD enabled.
src/coreclr/inc/readytoruninstructionset.h	Adds native R2R instruction set enum values for WasmBase/PackedSimd.
src/coreclr/inc/jiteeversionguid.h	Updates JIT/EE interface GUID due to instruction set contract changes.
src/coreclr/inc/corinfoinstructionset.h	Adds Wasm CORINFO instruction set enum values and implication validity rules.
src/coreclr/crossgen-corelib.proj	Passes the new SIMD NYI-to-R2R-unsupported config option for wasm crossgen.

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

Copilot

Copilot encountered an error and was unable to review this pull request. You can try again by re-requesting a review.

…for Wasm for the time being

…/runtime into adamperlin/wasm-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 32 out of 32 changed files in this pull request and generated 5 comments.

…-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/abi.cpp:131

For Size==12 (Vector3 / TYP_SIMD12), this currently falls through to case 16 and returns TYP_SIMD16. That contradicts the comment for GetRegisterType (“smallest type larger or equal to Size”) and can lose the distinction between SIMD12 vs SIMD16 in later handling (SIMD12 has special casing in multiple backends).

#if defined(FEATURE_SIMD) && defined(TARGET_WASM)
case 12:
#endif
#ifdef FEATURE_SIMD
case 16:
return TYP_SIMD16;
#endif

…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/valuenum.cpp:8359

This switch (ni) case body is no longer properly guarded for TARGET_WASM: the case NI_ArmBase_LeadingZeroCount / case NI_AVX2_LeadingZeroCount labels are removed by the preprocessor, but the { ... return ... } block is still compiled as an unlabeled statement inside the switch. It's currently unreachable, but it's brittle and could become reachable via fallthrough, and it makes the switch structure incorrect for Wasm builds.

#if defined(TARGET_ARM64)
case NI_ArmBase_LeadingZeroCount:
#elif defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
#endif
{
assert(!varTypeIsSmall(type) && !varTypeIsLong(type));

adamperlin · 2026-06-16T15:51:08Z

/ba-g infra failures

adamperlin · 2026-06-16T15:54:15Z

@AndyAyersMS Can you take another look? I've made some pushes since the last review since I had to adjust superpmi collection and replay due to the presence of the new NyiWasmSimd option.

dotnet-policy-service · 2026-06-17T08:18:44Z

Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
See info in area-owners.md if you want to be subscribed.

This is a follow up to #129140, so there is some duplicated diff. This PR enables `FEATURE_SIMD` and `FEATURE_HW_INTRINSICS` for `TARGET_WASM` and stubs out the minimal necessary pieces of implementation using a new `NYI_WASM_SIMD` macro and associated JitOption, `NyiWasmSimdToR2RUnsupported` to prevent crossgen failures due to the presence of intrinsics. There are a few patterns that showed up commonly which required many ifdef adjustments: 1. Assuming `!TARGET_XARCH` -> `TARGET_ARM64` if hardware intrinsics are enabled (not the case anymore with wasm) 2. Assuming `FEATURE_HW_INTRINSICS` -> `FEATURE_MASKED_HW_INTRINSICS` (not the case either for Wasm, as Wasm doesn't have any kind of mask register). Stub `HARDWARE_INTRINSIC` definitions were added for quite a few xplat `Vector128` operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with `FEATURE_HARDWARE_INTRINSICS` in many places. --------- Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

adamperlin · 2026-06-10T01:10:20Z

This is a follow up to #129140, so there is some duplicated diff. This PR enables FEATURE_SIMD and FEATURE_HW_INTRINSICS for TARGET_WASM and stubs out the minimal necessary pieces of implementation using a new NYI_WASM_SIMD macro and associated JitOption, NyiWasmSimdToR2RUnsupported to prevent crossgen failures due to the presence of intrinsics.

There are a few patterns that showed up commonly which required many ifdef adjustments:

Assuming !TARGET_XARCH -> TARGET_ARM64 if hardware intrinsics are enabled (not the case anymore with wasm)
Assuming FEATURE_HW_INTRINSICS -> FEATURE_MASKED_HW_INTRINSICS (not the case either for Wasm, as Wasm doesn't have any kind of mask register).

Stub HARDWARE_INTRINSIC definitions were added for quite a few xplat Vector128 operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with FEATURE_HARDWARE_INTRINSICS in many places.

…SICS

…s, masked hw intrinsics assumptions

…_HW_INTRINSICS

…tor128 instruction set

…-simd-skeleton

…b during build

…ion during product build

…asm.h and try and make argument counts correct

Copilot

Pull request overview

This PR wires up WebAssembly (Wasm32) support for CoreCLR JIT hardware intrinsics/SIMD at the infrastructure level: new instruction set definitions, JIT/EE interface plumbing, and Wasm-specific stubs/NYI paths to keep R2R/crossgen from failing while the implementation is still incomplete.

Changes:

Add Wasm32 instruction set + ReadyToRun instruction set definitions (WasmBase, PackedSimd, Vector128) and propagate them through the JIT interface/tooling.
Enable FEATURE_SIMD/FEATURE_HW_INTRINSICS for the standalone Wasm JIT build and add initial Wasm-specific HWIntrinsic plumbing (import/lower/codegen stubs and intrinsic lists).
Introduce NYI_WASM_SIMD + a new JitConfig switch and ensure wasm crossgen uses it to convert NYIs into R2R-unsupported skips.

Reviewed changes

Copilot reviewed 32 out of 32 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs	Maps `Wasm32` to `TARGET_WASM` for generated native ifdefs.
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt	Adds Wasm32 ISA definitions and R2R bits for WasmBase/PackedSimd.
src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs	Adds Wasm32 instruction sets and implication expansion in managed JIT interface helpers.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs	Maps Wasm32 instruction sets to R2R instruction set enums.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs	Adds new R2R enum values for WasmBase/PackedSimd.
src/coreclr/jit/valuenumfuncs.h	Includes Wasm HWIntrinsic VN function defs and defines the HWIntrinsic VN range for Wasm.
src/coreclr/jit/valuenum.cpp	Gates masked-intrinsic VN evaluation/constant folding and adjusts ISA-specific handling for Wasm.
src/coreclr/jit/targetwasm.h	Updates Wasm SIMD register sizing/ABI constants and defines SIMD-related feature macros.
src/coreclr/jit/regset.h	Allows SIMD temp sizing to use FP/SIMD register size on Wasm.
src/coreclr/jit/registeropswasm.cpp	Maps SIMD types to Wasm `v128` and treats v128 as a valid “float” reg kind.
src/coreclr/jit/namedintrinsiclist.h	Adds Wasm HWIntrinsic list inclusion to populate NI_* for Wasm.
src/coreclr/jit/morph.cpp	Adds Wasm NYI stubs and gates masked-intrinsics-specific morphing logic.
src/coreclr/jit/lowerwasm.cpp	Adds Wasm lowering/containment NYI hooks for HWIntrinsic nodes.
src/coreclr/jit/jitconfigvalues.h	Adds `JitWasmSimdNyiToR2RUnsupported` config knob.
src/coreclr/jit/importercalls.cpp	Adjusts intrinsic namespace matching for Wasm and prevents some HWIntrinsic paths on Wasm.
src/coreclr/jit/hwintrinsicwasm.cpp	New Wasm HWIntrinsic helper stubs (lookup ISA, immediates, special imports).
src/coreclr/jit/hwintrinsiclistwasm.h	New Wasm HWIntrinsic list (initial Vector128 cross-platform surface, mostly stubbed).
src/coreclr/jit/hwintrinsiccodegenwasm.cpp	New Wasm HWIntrinsic codegen entrypoint stub.
src/coreclr/jit/hwintrinsic.h	Adds Wasm HWIntrinsic categories/flags and integrates them into common helpers.
src/coreclr/jit/hwintrinsic.cpp	Adds Wasm HWIntrinsic info array + ISA range array entry (currently incomplete).
src/coreclr/jit/gentree.cpp	Adjusts node sizing for Wasm HWIntrinsic nodes and gates masked-intrinsics helpers.
src/coreclr/jit/error.h	Introduces `NYI_WASM_SIMD` macro behavior with R2R-unsupported option.
src/coreclr/jit/compiler.h	Gates masked-intrinsic-only helpers and enables vector-length helpers for Wasm.
src/coreclr/jit/codegenlinear.cpp	Enables multi-op consume logic for Wasm by shifting `#ifndef TARGET_WASM` region.
src/coreclr/jit/codegen.h	Restricts mask-constant overload to masked-intrinsics builds.
src/coreclr/jit/CMakeLists.txt	Enables SIMD/HWIntrinsic defines for Wasm standalone JIT build + adds new Wasm sources.
src/coreclr/jit/assertionprop.cpp	Notes Wasm TODOs for CTZ/CLZ range reasoning.
src/coreclr/jit/abi.cpp	Treats 12-byte FP segments as SIMD register types on Wasm when SIMD enabled.
src/coreclr/inc/readytoruninstructionset.h	Adds native R2R instruction set enum values for WasmBase/PackedSimd.
src/coreclr/inc/jiteeversionguid.h	Updates JIT/EE interface GUID due to instruction set contract changes.
src/coreclr/inc/corinfoinstructionset.h	Adds Wasm CORINFO instruction set enum values and implication validity rules.
src/coreclr/crossgen-corelib.proj	Passes the new SIMD NYI-to-R2R-unsupported config option for wasm crossgen.

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

Copilot

Copilot encountered an error and was unable to review this pull request. You can try again by re-requesting a review.

…for Wasm for the time being

…/runtime into adamperlin/wasm-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 32 out of 32 changed files in this pull request and generated 5 comments.

…-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/abi.cpp:131

For Size==12 (Vector3 / TYP_SIMD12), this currently falls through to case 16 and returns TYP_SIMD16. That contradicts the comment for GetRegisterType (“smallest type larger or equal to Size”) and can lose the distinction between SIMD12 vs SIMD16 in later handling (SIMD12 has special casing in multiple backends).

#if defined(FEATURE_SIMD) && defined(TARGET_WASM)
case 12:
#endif
#ifdef FEATURE_SIMD
case 16:
return TYP_SIMD16;
#endif

…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/valuenum.cpp:8359

This switch (ni) case body is no longer properly guarded for TARGET_WASM: the case NI_ArmBase_LeadingZeroCount / case NI_AVX2_LeadingZeroCount labels are removed by the preprocessor, but the { ... return ... } block is still compiled as an unlabeled statement inside the switch. It's currently unreachable, but it's brittle and could become reachable via fallthrough, and it makes the switch structure incorrect for Wasm builds.

#if defined(TARGET_ARM64)
case NI_ArmBase_LeadingZeroCount:
#elif defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
#endif
{
assert(!varTypeIsSmall(type) && !varTypeIsLong(type));

adamperlin · 2026-06-16T15:51:08Z

/ba-g infra failures

adamperlin · 2026-06-16T15:54:15Z

@AndyAyersMS Can you take another look? I've made some pushes since the last review since I had to adjust superpmi collection and replay due to the presence of the new NyiWasmSimd option.

dotnet-policy-service · 2026-06-17T08:18:44Z

Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
See info in area-owners.md if you want to be subscribed.

This is a follow up to #129140, so there is some duplicated diff. This PR enables `FEATURE_SIMD` and `FEATURE_HW_INTRINSICS` for `TARGET_WASM` and stubs out the minimal necessary pieces of implementation using a new `NYI_WASM_SIMD` macro and associated JitOption, `NyiWasmSimdToR2RUnsupported` to prevent crossgen failures due to the presence of intrinsics. There are a few patterns that showed up commonly which required many ifdef adjustments: 1. Assuming `!TARGET_XARCH` -> `TARGET_ARM64` if hardware intrinsics are enabled (not the case anymore with wasm) 2. Assuming `FEATURE_HW_INTRINSICS` -> `FEATURE_MASKED_HW_INTRINSICS` (not the case either for Wasm, as Wasm doesn't have any kind of mask register). Stub `HARDWARE_INTRINSIC` definitions were added for quite a few xplat `Vector128` operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with `FEATURE_HARDWARE_INTRINSICS` in many places. --------- Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

adamperlin · 2026-06-10T01:10:20Z

This is a follow up to #129140, so there is some duplicated diff. This PR enables FEATURE_SIMD and FEATURE_HW_INTRINSICS for TARGET_WASM and stubs out the minimal necessary pieces of implementation using a new NYI_WASM_SIMD macro and associated JitOption, NyiWasmSimdToR2RUnsupported to prevent crossgen failures due to the presence of intrinsics.

There are a few patterns that showed up commonly which required many ifdef adjustments:

Assuming !TARGET_XARCH -> TARGET_ARM64 if hardware intrinsics are enabled (not the case anymore with wasm)
Assuming FEATURE_HW_INTRINSICS -> FEATURE_MASKED_HW_INTRINSICS (not the case either for Wasm, as Wasm doesn't have any kind of mask register).

Stub HARDWARE_INTRINSIC definitions were added for quite a few xplat Vector128 operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with FEATURE_HARDWARE_INTRINSICS in many places.

…SICS

…s, masked hw intrinsics assumptions

…_HW_INTRINSICS

…tor128 instruction set

…-simd-skeleton

…b during build

…ion during product build

…asm.h and try and make argument counts correct

Copilot

Pull request overview

This PR wires up WebAssembly (Wasm32) support for CoreCLR JIT hardware intrinsics/SIMD at the infrastructure level: new instruction set definitions, JIT/EE interface plumbing, and Wasm-specific stubs/NYI paths to keep R2R/crossgen from failing while the implementation is still incomplete.

Changes:

Add Wasm32 instruction set + ReadyToRun instruction set definitions (WasmBase, PackedSimd, Vector128) and propagate them through the JIT interface/tooling.
Enable FEATURE_SIMD/FEATURE_HW_INTRINSICS for the standalone Wasm JIT build and add initial Wasm-specific HWIntrinsic plumbing (import/lower/codegen stubs and intrinsic lists).
Introduce NYI_WASM_SIMD + a new JitConfig switch and ensure wasm crossgen uses it to convert NYIs into R2R-unsupported skips.

Reviewed changes

Copilot reviewed 32 out of 32 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs	Maps `Wasm32` to `TARGET_WASM` for generated native ifdefs.
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt	Adds Wasm32 ISA definitions and R2R bits for WasmBase/PackedSimd.
src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs	Adds Wasm32 instruction sets and implication expansion in managed JIT interface helpers.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs	Maps Wasm32 instruction sets to R2R instruction set enums.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs	Adds new R2R enum values for WasmBase/PackedSimd.
src/coreclr/jit/valuenumfuncs.h	Includes Wasm HWIntrinsic VN function defs and defines the HWIntrinsic VN range for Wasm.
src/coreclr/jit/valuenum.cpp	Gates masked-intrinsic VN evaluation/constant folding and adjusts ISA-specific handling for Wasm.
src/coreclr/jit/targetwasm.h	Updates Wasm SIMD register sizing/ABI constants and defines SIMD-related feature macros.
src/coreclr/jit/regset.h	Allows SIMD temp sizing to use FP/SIMD register size on Wasm.
src/coreclr/jit/registeropswasm.cpp	Maps SIMD types to Wasm `v128` and treats v128 as a valid “float” reg kind.
src/coreclr/jit/namedintrinsiclist.h	Adds Wasm HWIntrinsic list inclusion to populate NI_* for Wasm.
src/coreclr/jit/morph.cpp	Adds Wasm NYI stubs and gates masked-intrinsics-specific morphing logic.
src/coreclr/jit/lowerwasm.cpp	Adds Wasm lowering/containment NYI hooks for HWIntrinsic nodes.
src/coreclr/jit/jitconfigvalues.h	Adds `JitWasmSimdNyiToR2RUnsupported` config knob.
src/coreclr/jit/importercalls.cpp	Adjusts intrinsic namespace matching for Wasm and prevents some HWIntrinsic paths on Wasm.
src/coreclr/jit/hwintrinsicwasm.cpp	New Wasm HWIntrinsic helper stubs (lookup ISA, immediates, special imports).
src/coreclr/jit/hwintrinsiclistwasm.h	New Wasm HWIntrinsic list (initial Vector128 cross-platform surface, mostly stubbed).
src/coreclr/jit/hwintrinsiccodegenwasm.cpp	New Wasm HWIntrinsic codegen entrypoint stub.
src/coreclr/jit/hwintrinsic.h	Adds Wasm HWIntrinsic categories/flags and integrates them into common helpers.
src/coreclr/jit/hwintrinsic.cpp	Adds Wasm HWIntrinsic info array + ISA range array entry (currently incomplete).
src/coreclr/jit/gentree.cpp	Adjusts node sizing for Wasm HWIntrinsic nodes and gates masked-intrinsics helpers.
src/coreclr/jit/error.h	Introduces `NYI_WASM_SIMD` macro behavior with R2R-unsupported option.
src/coreclr/jit/compiler.h	Gates masked-intrinsic-only helpers and enables vector-length helpers for Wasm.
src/coreclr/jit/codegenlinear.cpp	Enables multi-op consume logic for Wasm by shifting `#ifndef TARGET_WASM` region.
src/coreclr/jit/codegen.h	Restricts mask-constant overload to masked-intrinsics builds.
src/coreclr/jit/CMakeLists.txt	Enables SIMD/HWIntrinsic defines for Wasm standalone JIT build + adds new Wasm sources.
src/coreclr/jit/assertionprop.cpp	Notes Wasm TODOs for CTZ/CLZ range reasoning.
src/coreclr/jit/abi.cpp	Treats 12-byte FP segments as SIMD register types on Wasm when SIMD enabled.
src/coreclr/inc/readytoruninstructionset.h	Adds native R2R instruction set enum values for WasmBase/PackedSimd.
src/coreclr/inc/jiteeversionguid.h	Updates JIT/EE interface GUID due to instruction set contract changes.
src/coreclr/inc/corinfoinstructionset.h	Adds Wasm CORINFO instruction set enum values and implication validity rules.
src/coreclr/crossgen-corelib.proj	Passes the new SIMD NYI-to-R2R-unsupported config option for wasm crossgen.

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

Copilot

Copilot encountered an error and was unable to review this pull request. You can try again by re-requesting a review.

…for Wasm for the time being

…/runtime into adamperlin/wasm-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 32 out of 32 changed files in this pull request and generated 5 comments.

…-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/abi.cpp:131

For Size==12 (Vector3 / TYP_SIMD12), this currently falls through to case 16 and returns TYP_SIMD16. That contradicts the comment for GetRegisterType (“smallest type larger or equal to Size”) and can lose the distinction between SIMD12 vs SIMD16 in later handling (SIMD12 has special casing in multiple backends).

#if defined(FEATURE_SIMD) && defined(TARGET_WASM)
case 12:
#endif
#ifdef FEATURE_SIMD
case 16:
return TYP_SIMD16;
#endif

…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/valuenum.cpp:8359

This switch (ni) case body is no longer properly guarded for TARGET_WASM: the case NI_ArmBase_LeadingZeroCount / case NI_AVX2_LeadingZeroCount labels are removed by the preprocessor, but the { ... return ... } block is still compiled as an unlabeled statement inside the switch. It's currently unreachable, but it's brittle and could become reachable via fallthrough, and it makes the switch structure incorrect for Wasm builds.

#if defined(TARGET_ARM64)
case NI_ArmBase_LeadingZeroCount:
#elif defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
#endif
{
assert(!varTypeIsSmall(type) && !varTypeIsLong(type));

adamperlin · 2026-06-16T15:51:08Z

/ba-g infra failures

adamperlin · 2026-06-16T15:54:15Z

@AndyAyersMS Can you take another look? I've made some pushes since the last review since I had to adjust superpmi collection and replay due to the presence of the new NyiWasmSimd option.

dotnet-policy-service · 2026-06-17T08:18:44Z

Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
See info in area-owners.md if you want to be subscribed.

This is a follow up to #129140, so there is some duplicated diff. This PR enables `FEATURE_SIMD` and `FEATURE_HW_INTRINSICS` for `TARGET_WASM` and stubs out the minimal necessary pieces of implementation using a new `NYI_WASM_SIMD` macro and associated JitOption, `NyiWasmSimdToR2RUnsupported` to prevent crossgen failures due to the presence of intrinsics. There are a few patterns that showed up commonly which required many ifdef adjustments: 1. Assuming `!TARGET_XARCH` -> `TARGET_ARM64` if hardware intrinsics are enabled (not the case anymore with wasm) 2. Assuming `FEATURE_HW_INTRINSICS` -> `FEATURE_MASKED_HW_INTRINSICS` (not the case either for Wasm, as Wasm doesn't have any kind of mask register). Stub `HARDWARE_INTRINSIC` definitions were added for quite a few xplat `Vector128` operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with `FEATURE_HARDWARE_INTRINSICS` in many places. --------- Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

adamperlin · 2026-06-10T01:10:20Z

This is a follow up to #129140, so there is some duplicated diff. This PR enables FEATURE_SIMD and FEATURE_HW_INTRINSICS for TARGET_WASM and stubs out the minimal necessary pieces of implementation using a new NYI_WASM_SIMD macro and associated JitOption, NyiWasmSimdToR2RUnsupported to prevent crossgen failures due to the presence of intrinsics.

There are a few patterns that showed up commonly which required many ifdef adjustments:

Assuming !TARGET_XARCH -> TARGET_ARM64 if hardware intrinsics are enabled (not the case anymore with wasm)
Assuming FEATURE_HW_INTRINSICS -> FEATURE_MASKED_HW_INTRINSICS (not the case either for Wasm, as Wasm doesn't have any kind of mask register).

Stub HARDWARE_INTRINSIC definitions were added for quite a few xplat Vector128 operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with FEATURE_HARDWARE_INTRINSICS in many places.

…SICS

…s, masked hw intrinsics assumptions

…_HW_INTRINSICS

…tor128 instruction set

…-simd-skeleton

…b during build

…ion during product build

…asm.h and try and make argument counts correct

Copilot

Pull request overview

This PR wires up WebAssembly (Wasm32) support for CoreCLR JIT hardware intrinsics/SIMD at the infrastructure level: new instruction set definitions, JIT/EE interface plumbing, and Wasm-specific stubs/NYI paths to keep R2R/crossgen from failing while the implementation is still incomplete.

Changes:

Add Wasm32 instruction set + ReadyToRun instruction set definitions (WasmBase, PackedSimd, Vector128) and propagate them through the JIT interface/tooling.
Enable FEATURE_SIMD/FEATURE_HW_INTRINSICS for the standalone Wasm JIT build and add initial Wasm-specific HWIntrinsic plumbing (import/lower/codegen stubs and intrinsic lists).
Introduce NYI_WASM_SIMD + a new JitConfig switch and ensure wasm crossgen uses it to convert NYIs into R2R-unsupported skips.

Reviewed changes

Copilot reviewed 32 out of 32 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs	Maps `Wasm32` to `TARGET_WASM` for generated native ifdefs.
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt	Adds Wasm32 ISA definitions and R2R bits for WasmBase/PackedSimd.
src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs	Adds Wasm32 instruction sets and implication expansion in managed JIT interface helpers.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs	Maps Wasm32 instruction sets to R2R instruction set enums.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs	Adds new R2R enum values for WasmBase/PackedSimd.
src/coreclr/jit/valuenumfuncs.h	Includes Wasm HWIntrinsic VN function defs and defines the HWIntrinsic VN range for Wasm.
src/coreclr/jit/valuenum.cpp	Gates masked-intrinsic VN evaluation/constant folding and adjusts ISA-specific handling for Wasm.
src/coreclr/jit/targetwasm.h	Updates Wasm SIMD register sizing/ABI constants and defines SIMD-related feature macros.
src/coreclr/jit/regset.h	Allows SIMD temp sizing to use FP/SIMD register size on Wasm.
src/coreclr/jit/registeropswasm.cpp	Maps SIMD types to Wasm `v128` and treats v128 as a valid “float” reg kind.
src/coreclr/jit/namedintrinsiclist.h	Adds Wasm HWIntrinsic list inclusion to populate NI_* for Wasm.
src/coreclr/jit/morph.cpp	Adds Wasm NYI stubs and gates masked-intrinsics-specific morphing logic.
src/coreclr/jit/lowerwasm.cpp	Adds Wasm lowering/containment NYI hooks for HWIntrinsic nodes.
src/coreclr/jit/jitconfigvalues.h	Adds `JitWasmSimdNyiToR2RUnsupported` config knob.
src/coreclr/jit/importercalls.cpp	Adjusts intrinsic namespace matching for Wasm and prevents some HWIntrinsic paths on Wasm.
src/coreclr/jit/hwintrinsicwasm.cpp	New Wasm HWIntrinsic helper stubs (lookup ISA, immediates, special imports).
src/coreclr/jit/hwintrinsiclistwasm.h	New Wasm HWIntrinsic list (initial Vector128 cross-platform surface, mostly stubbed).
src/coreclr/jit/hwintrinsiccodegenwasm.cpp	New Wasm HWIntrinsic codegen entrypoint stub.
src/coreclr/jit/hwintrinsic.h	Adds Wasm HWIntrinsic categories/flags and integrates them into common helpers.
src/coreclr/jit/hwintrinsic.cpp	Adds Wasm HWIntrinsic info array + ISA range array entry (currently incomplete).
src/coreclr/jit/gentree.cpp	Adjusts node sizing for Wasm HWIntrinsic nodes and gates masked-intrinsics helpers.
src/coreclr/jit/error.h	Introduces `NYI_WASM_SIMD` macro behavior with R2R-unsupported option.
src/coreclr/jit/compiler.h	Gates masked-intrinsic-only helpers and enables vector-length helpers for Wasm.
src/coreclr/jit/codegenlinear.cpp	Enables multi-op consume logic for Wasm by shifting `#ifndef TARGET_WASM` region.
src/coreclr/jit/codegen.h	Restricts mask-constant overload to masked-intrinsics builds.
src/coreclr/jit/CMakeLists.txt	Enables SIMD/HWIntrinsic defines for Wasm standalone JIT build + adds new Wasm sources.
src/coreclr/jit/assertionprop.cpp	Notes Wasm TODOs for CTZ/CLZ range reasoning.
src/coreclr/jit/abi.cpp	Treats 12-byte FP segments as SIMD register types on Wasm when SIMD enabled.
src/coreclr/inc/readytoruninstructionset.h	Adds native R2R instruction set enum values for WasmBase/PackedSimd.
src/coreclr/inc/jiteeversionguid.h	Updates JIT/EE interface GUID due to instruction set contract changes.
src/coreclr/inc/corinfoinstructionset.h	Adds Wasm CORINFO instruction set enum values and implication validity rules.
src/coreclr/crossgen-corelib.proj	Passes the new SIMD NYI-to-R2R-unsupported config option for wasm crossgen.

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

Copilot

Copilot encountered an error and was unable to review this pull request. You can try again by re-requesting a review.

…for Wasm for the time being

…/runtime into adamperlin/wasm-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 32 out of 32 changed files in this pull request and generated 5 comments.

…-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/abi.cpp:131

For Size==12 (Vector3 / TYP_SIMD12), this currently falls through to case 16 and returns TYP_SIMD16. That contradicts the comment for GetRegisterType (“smallest type larger or equal to Size”) and can lose the distinction between SIMD12 vs SIMD16 in later handling (SIMD12 has special casing in multiple backends).

#if defined(FEATURE_SIMD) && defined(TARGET_WASM)
case 12:
#endif
#ifdef FEATURE_SIMD
case 16:
return TYP_SIMD16;
#endif

…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/valuenum.cpp:8359

This switch (ni) case body is no longer properly guarded for TARGET_WASM: the case NI_ArmBase_LeadingZeroCount / case NI_AVX2_LeadingZeroCount labels are removed by the preprocessor, but the { ... return ... } block is still compiled as an unlabeled statement inside the switch. It's currently unreachable, but it's brittle and could become reachable via fallthrough, and it makes the switch structure incorrect for Wasm builds.

#if defined(TARGET_ARM64)
case NI_ArmBase_LeadingZeroCount:
#elif defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
#endif
{
assert(!varTypeIsSmall(type) && !varTypeIsLong(type));

adamperlin · 2026-06-16T15:51:08Z

/ba-g infra failures

adamperlin · 2026-06-16T15:54:15Z

@AndyAyersMS Can you take another look? I've made some pushes since the last review since I had to adjust superpmi collection and replay due to the presence of the new NyiWasmSimd option.

dotnet-policy-service · 2026-06-17T08:18:44Z

Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
See info in area-owners.md if you want to be subscribed.

This is a follow up to #129140, so there is some duplicated diff. This PR enables `FEATURE_SIMD` and `FEATURE_HW_INTRINSICS` for `TARGET_WASM` and stubs out the minimal necessary pieces of implementation using a new `NYI_WASM_SIMD` macro and associated JitOption, `NyiWasmSimdToR2RUnsupported` to prevent crossgen failures due to the presence of intrinsics. There are a few patterns that showed up commonly which required many ifdef adjustments: 1. Assuming `!TARGET_XARCH` -> `TARGET_ARM64` if hardware intrinsics are enabled (not the case anymore with wasm) 2. Assuming `FEATURE_HW_INTRINSICS` -> `FEATURE_MASKED_HW_INTRINSICS` (not the case either for Wasm, as Wasm doesn't have any kind of mask register). Stub `HARDWARE_INTRINSIC` definitions were added for quite a few xplat `Vector128` operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with `FEATURE_HARDWARE_INTRINSICS` in many places. --------- Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

adamperlin · 2026-06-10T01:10:20Z

This is a follow up to #129140, so there is some duplicated diff. This PR enables FEATURE_SIMD and FEATURE_HW_INTRINSICS for TARGET_WASM and stubs out the minimal necessary pieces of implementation using a new NYI_WASM_SIMD macro and associated JitOption, NyiWasmSimdToR2RUnsupported to prevent crossgen failures due to the presence of intrinsics.

There are a few patterns that showed up commonly which required many ifdef adjustments:

Assuming !TARGET_XARCH -> TARGET_ARM64 if hardware intrinsics are enabled (not the case anymore with wasm)
Assuming FEATURE_HW_INTRINSICS -> FEATURE_MASKED_HW_INTRINSICS (not the case either for Wasm, as Wasm doesn't have any kind of mask register).

Stub HARDWARE_INTRINSIC definitions were added for quite a few xplat Vector128 operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with FEATURE_HARDWARE_INTRINSICS in many places.

…SICS

…s, masked hw intrinsics assumptions

…_HW_INTRINSICS

…tor128 instruction set

…-simd-skeleton

…b during build

…ion during product build

…asm.h and try and make argument counts correct

Copilot

Pull request overview

This PR wires up WebAssembly (Wasm32) support for CoreCLR JIT hardware intrinsics/SIMD at the infrastructure level: new instruction set definitions, JIT/EE interface plumbing, and Wasm-specific stubs/NYI paths to keep R2R/crossgen from failing while the implementation is still incomplete.

Changes:

Add Wasm32 instruction set + ReadyToRun instruction set definitions (WasmBase, PackedSimd, Vector128) and propagate them through the JIT interface/tooling.
Enable FEATURE_SIMD/FEATURE_HW_INTRINSICS for the standalone Wasm JIT build and add initial Wasm-specific HWIntrinsic plumbing (import/lower/codegen stubs and intrinsic lists).
Introduce NYI_WASM_SIMD + a new JitConfig switch and ensure wasm crossgen uses it to convert NYIs into R2R-unsupported skips.

Reviewed changes

Copilot reviewed 32 out of 32 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs	Maps `Wasm32` to `TARGET_WASM` for generated native ifdefs.
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt	Adds Wasm32 ISA definitions and R2R bits for WasmBase/PackedSimd.
src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs	Adds Wasm32 instruction sets and implication expansion in managed JIT interface helpers.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs	Maps Wasm32 instruction sets to R2R instruction set enums.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs	Adds new R2R enum values for WasmBase/PackedSimd.
src/coreclr/jit/valuenumfuncs.h	Includes Wasm HWIntrinsic VN function defs and defines the HWIntrinsic VN range for Wasm.
src/coreclr/jit/valuenum.cpp	Gates masked-intrinsic VN evaluation/constant folding and adjusts ISA-specific handling for Wasm.
src/coreclr/jit/targetwasm.h	Updates Wasm SIMD register sizing/ABI constants and defines SIMD-related feature macros.
src/coreclr/jit/regset.h	Allows SIMD temp sizing to use FP/SIMD register size on Wasm.
src/coreclr/jit/registeropswasm.cpp	Maps SIMD types to Wasm `v128` and treats v128 as a valid “float” reg kind.
src/coreclr/jit/namedintrinsiclist.h	Adds Wasm HWIntrinsic list inclusion to populate NI_* for Wasm.
src/coreclr/jit/morph.cpp	Adds Wasm NYI stubs and gates masked-intrinsics-specific morphing logic.
src/coreclr/jit/lowerwasm.cpp	Adds Wasm lowering/containment NYI hooks for HWIntrinsic nodes.
src/coreclr/jit/jitconfigvalues.h	Adds `JitWasmSimdNyiToR2RUnsupported` config knob.
src/coreclr/jit/importercalls.cpp	Adjusts intrinsic namespace matching for Wasm and prevents some HWIntrinsic paths on Wasm.
src/coreclr/jit/hwintrinsicwasm.cpp	New Wasm HWIntrinsic helper stubs (lookup ISA, immediates, special imports).
src/coreclr/jit/hwintrinsiclistwasm.h	New Wasm HWIntrinsic list (initial Vector128 cross-platform surface, mostly stubbed).
src/coreclr/jit/hwintrinsiccodegenwasm.cpp	New Wasm HWIntrinsic codegen entrypoint stub.
src/coreclr/jit/hwintrinsic.h	Adds Wasm HWIntrinsic categories/flags and integrates them into common helpers.
src/coreclr/jit/hwintrinsic.cpp	Adds Wasm HWIntrinsic info array + ISA range array entry (currently incomplete).
src/coreclr/jit/gentree.cpp	Adjusts node sizing for Wasm HWIntrinsic nodes and gates masked-intrinsics helpers.
src/coreclr/jit/error.h	Introduces `NYI_WASM_SIMD` macro behavior with R2R-unsupported option.
src/coreclr/jit/compiler.h	Gates masked-intrinsic-only helpers and enables vector-length helpers for Wasm.
src/coreclr/jit/codegenlinear.cpp	Enables multi-op consume logic for Wasm by shifting `#ifndef TARGET_WASM` region.
src/coreclr/jit/codegen.h	Restricts mask-constant overload to masked-intrinsics builds.
src/coreclr/jit/CMakeLists.txt	Enables SIMD/HWIntrinsic defines for Wasm standalone JIT build + adds new Wasm sources.
src/coreclr/jit/assertionprop.cpp	Notes Wasm TODOs for CTZ/CLZ range reasoning.
src/coreclr/jit/abi.cpp	Treats 12-byte FP segments as SIMD register types on Wasm when SIMD enabled.
src/coreclr/inc/readytoruninstructionset.h	Adds native R2R instruction set enum values for WasmBase/PackedSimd.
src/coreclr/inc/jiteeversionguid.h	Updates JIT/EE interface GUID due to instruction set contract changes.
src/coreclr/inc/corinfoinstructionset.h	Adds Wasm CORINFO instruction set enum values and implication validity rules.
src/coreclr/crossgen-corelib.proj	Passes the new SIMD NYI-to-R2R-unsupported config option for wasm crossgen.

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

Copilot

Copilot encountered an error and was unable to review this pull request. You can try again by re-requesting a review.

…for Wasm for the time being

…/runtime into adamperlin/wasm-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 32 out of 32 changed files in this pull request and generated 5 comments.

…-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/abi.cpp:131

For Size==12 (Vector3 / TYP_SIMD12), this currently falls through to case 16 and returns TYP_SIMD16. That contradicts the comment for GetRegisterType (“smallest type larger or equal to Size”) and can lose the distinction between SIMD12 vs SIMD16 in later handling (SIMD12 has special casing in multiple backends).

#if defined(FEATURE_SIMD) && defined(TARGET_WASM)
case 12:
#endif
#ifdef FEATURE_SIMD
case 16:
return TYP_SIMD16;
#endif

…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/valuenum.cpp:8359

This switch (ni) case body is no longer properly guarded for TARGET_WASM: the case NI_ArmBase_LeadingZeroCount / case NI_AVX2_LeadingZeroCount labels are removed by the preprocessor, but the { ... return ... } block is still compiled as an unlabeled statement inside the switch. It's currently unreachable, but it's brittle and could become reachable via fallthrough, and it makes the switch structure incorrect for Wasm builds.

#if defined(TARGET_ARM64)
case NI_ArmBase_LeadingZeroCount:
#elif defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
#endif
{
assert(!varTypeIsSmall(type) && !varTypeIsLong(type));

adamperlin · 2026-06-16T15:51:08Z

/ba-g infra failures

adamperlin · 2026-06-16T15:54:15Z

@AndyAyersMS Can you take another look? I've made some pushes since the last review since I had to adjust superpmi collection and replay due to the presence of the new NyiWasmSimd option.

dotnet-policy-service · 2026-06-17T08:18:44Z

Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
See info in area-owners.md if you want to be subscribed.

This is a follow up to #129140, so there is some duplicated diff. This PR enables `FEATURE_SIMD` and `FEATURE_HW_INTRINSICS` for `TARGET_WASM` and stubs out the minimal necessary pieces of implementation using a new `NYI_WASM_SIMD` macro and associated JitOption, `NyiWasmSimdToR2RUnsupported` to prevent crossgen failures due to the presence of intrinsics. There are a few patterns that showed up commonly which required many ifdef adjustments: 1. Assuming `!TARGET_XARCH` -> `TARGET_ARM64` if hardware intrinsics are enabled (not the case anymore with wasm) 2. Assuming `FEATURE_HW_INTRINSICS` -> `FEATURE_MASKED_HW_INTRINSICS` (not the case either for Wasm, as Wasm doesn't have any kind of mask register). Stub `HARDWARE_INTRINSIC` definitions were added for quite a few xplat `Vector128` operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with `FEATURE_HARDWARE_INTRINSICS` in many places. --------- Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

adamperlin · 2026-06-10T01:10:20Z

This is a follow up to #129140, so there is some duplicated diff. This PR enables FEATURE_SIMD and FEATURE_HW_INTRINSICS for TARGET_WASM and stubs out the minimal necessary pieces of implementation using a new NYI_WASM_SIMD macro and associated JitOption, NyiWasmSimdToR2RUnsupported to prevent crossgen failures due to the presence of intrinsics.

There are a few patterns that showed up commonly which required many ifdef adjustments:

Assuming !TARGET_XARCH -> TARGET_ARM64 if hardware intrinsics are enabled (not the case anymore with wasm)
Assuming FEATURE_HW_INTRINSICS -> FEATURE_MASKED_HW_INTRINSICS (not the case either for Wasm, as Wasm doesn't have any kind of mask register).

Stub HARDWARE_INTRINSIC definitions were added for quite a few xplat Vector128 operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with FEATURE_HARDWARE_INTRINSICS in many places.

…SICS

…s, masked hw intrinsics assumptions

…_HW_INTRINSICS

…tor128 instruction set

…-simd-skeleton

…b during build

…ion during product build

…asm.h and try and make argument counts correct

Copilot

Pull request overview

This PR wires up WebAssembly (Wasm32) support for CoreCLR JIT hardware intrinsics/SIMD at the infrastructure level: new instruction set definitions, JIT/EE interface plumbing, and Wasm-specific stubs/NYI paths to keep R2R/crossgen from failing while the implementation is still incomplete.

Changes:

Add Wasm32 instruction set + ReadyToRun instruction set definitions (WasmBase, PackedSimd, Vector128) and propagate them through the JIT interface/tooling.
Enable FEATURE_SIMD/FEATURE_HW_INTRINSICS for the standalone Wasm JIT build and add initial Wasm-specific HWIntrinsic plumbing (import/lower/codegen stubs and intrinsic lists).
Introduce NYI_WASM_SIMD + a new JitConfig switch and ensure wasm crossgen uses it to convert NYIs into R2R-unsupported skips.

Reviewed changes

Copilot reviewed 32 out of 32 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs	Maps `Wasm32` to `TARGET_WASM` for generated native ifdefs.
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt	Adds Wasm32 ISA definitions and R2R bits for WasmBase/PackedSimd.
src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs	Adds Wasm32 instruction sets and implication expansion in managed JIT interface helpers.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs	Maps Wasm32 instruction sets to R2R instruction set enums.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs	Adds new R2R enum values for WasmBase/PackedSimd.
src/coreclr/jit/valuenumfuncs.h	Includes Wasm HWIntrinsic VN function defs and defines the HWIntrinsic VN range for Wasm.
src/coreclr/jit/valuenum.cpp	Gates masked-intrinsic VN evaluation/constant folding and adjusts ISA-specific handling for Wasm.
src/coreclr/jit/targetwasm.h	Updates Wasm SIMD register sizing/ABI constants and defines SIMD-related feature macros.
src/coreclr/jit/regset.h	Allows SIMD temp sizing to use FP/SIMD register size on Wasm.
src/coreclr/jit/registeropswasm.cpp	Maps SIMD types to Wasm `v128` and treats v128 as a valid “float” reg kind.
src/coreclr/jit/namedintrinsiclist.h	Adds Wasm HWIntrinsic list inclusion to populate NI_* for Wasm.
src/coreclr/jit/morph.cpp	Adds Wasm NYI stubs and gates masked-intrinsics-specific morphing logic.
src/coreclr/jit/lowerwasm.cpp	Adds Wasm lowering/containment NYI hooks for HWIntrinsic nodes.
src/coreclr/jit/jitconfigvalues.h	Adds `JitWasmSimdNyiToR2RUnsupported` config knob.
src/coreclr/jit/importercalls.cpp	Adjusts intrinsic namespace matching for Wasm and prevents some HWIntrinsic paths on Wasm.
src/coreclr/jit/hwintrinsicwasm.cpp	New Wasm HWIntrinsic helper stubs (lookup ISA, immediates, special imports).
src/coreclr/jit/hwintrinsiclistwasm.h	New Wasm HWIntrinsic list (initial Vector128 cross-platform surface, mostly stubbed).
src/coreclr/jit/hwintrinsiccodegenwasm.cpp	New Wasm HWIntrinsic codegen entrypoint stub.
src/coreclr/jit/hwintrinsic.h	Adds Wasm HWIntrinsic categories/flags and integrates them into common helpers.
src/coreclr/jit/hwintrinsic.cpp	Adds Wasm HWIntrinsic info array + ISA range array entry (currently incomplete).
src/coreclr/jit/gentree.cpp	Adjusts node sizing for Wasm HWIntrinsic nodes and gates masked-intrinsics helpers.
src/coreclr/jit/error.h	Introduces `NYI_WASM_SIMD` macro behavior with R2R-unsupported option.
src/coreclr/jit/compiler.h	Gates masked-intrinsic-only helpers and enables vector-length helpers for Wasm.
src/coreclr/jit/codegenlinear.cpp	Enables multi-op consume logic for Wasm by shifting `#ifndef TARGET_WASM` region.
src/coreclr/jit/codegen.h	Restricts mask-constant overload to masked-intrinsics builds.
src/coreclr/jit/CMakeLists.txt	Enables SIMD/HWIntrinsic defines for Wasm standalone JIT build + adds new Wasm sources.
src/coreclr/jit/assertionprop.cpp	Notes Wasm TODOs for CTZ/CLZ range reasoning.
src/coreclr/jit/abi.cpp	Treats 12-byte FP segments as SIMD register types on Wasm when SIMD enabled.
src/coreclr/inc/readytoruninstructionset.h	Adds native R2R instruction set enum values for WasmBase/PackedSimd.
src/coreclr/inc/jiteeversionguid.h	Updates JIT/EE interface GUID due to instruction set contract changes.
src/coreclr/inc/corinfoinstructionset.h	Adds Wasm CORINFO instruction set enum values and implication validity rules.
src/coreclr/crossgen-corelib.proj	Passes the new SIMD NYI-to-R2R-unsupported config option for wasm crossgen.

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

Copilot

Copilot encountered an error and was unable to review this pull request. You can try again by re-requesting a review.

…for Wasm for the time being

…/runtime into adamperlin/wasm-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 32 out of 32 changed files in this pull request and generated 5 comments.

…-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/abi.cpp:131

For Size==12 (Vector3 / TYP_SIMD12), this currently falls through to case 16 and returns TYP_SIMD16. That contradicts the comment for GetRegisterType (“smallest type larger or equal to Size”) and can lose the distinction between SIMD12 vs SIMD16 in later handling (SIMD12 has special casing in multiple backends).

#if defined(FEATURE_SIMD) && defined(TARGET_WASM)
case 12:
#endif
#ifdef FEATURE_SIMD
case 16:
return TYP_SIMD16;
#endif

…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/valuenum.cpp:8359

This switch (ni) case body is no longer properly guarded for TARGET_WASM: the case NI_ArmBase_LeadingZeroCount / case NI_AVX2_LeadingZeroCount labels are removed by the preprocessor, but the { ... return ... } block is still compiled as an unlabeled statement inside the switch. It's currently unreachable, but it's brittle and could become reachable via fallthrough, and it makes the switch structure incorrect for Wasm builds.

#if defined(TARGET_ARM64)
case NI_ArmBase_LeadingZeroCount:
#elif defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
#endif
{
assert(!varTypeIsSmall(type) && !varTypeIsLong(type));

adamperlin · 2026-06-16T15:51:08Z

/ba-g infra failures

adamperlin · 2026-06-16T15:54:15Z

@AndyAyersMS Can you take another look? I've made some pushes since the last review since I had to adjust superpmi collection and replay due to the presence of the new NyiWasmSimd option.

dotnet-policy-service · 2026-06-17T08:18:44Z

Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
See info in area-owners.md if you want to be subscribed.

This is a follow up to #129140, so there is some duplicated diff. This PR enables `FEATURE_SIMD` and `FEATURE_HW_INTRINSICS` for `TARGET_WASM` and stubs out the minimal necessary pieces of implementation using a new `NYI_WASM_SIMD` macro and associated JitOption, `NyiWasmSimdToR2RUnsupported` to prevent crossgen failures due to the presence of intrinsics. There are a few patterns that showed up commonly which required many ifdef adjustments: 1. Assuming `!TARGET_XARCH` -> `TARGET_ARM64` if hardware intrinsics are enabled (not the case anymore with wasm) 2. Assuming `FEATURE_HW_INTRINSICS` -> `FEATURE_MASKED_HW_INTRINSICS` (not the case either for Wasm, as Wasm doesn't have any kind of mask register). Stub `HARDWARE_INTRINSIC` definitions were added for quite a few xplat `Vector128` operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with `FEATURE_HARDWARE_INTRINSICS` in many places. --------- Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

adamperlin · 2026-06-10T01:10:20Z

This is a follow up to #129140, so there is some duplicated diff. This PR enables FEATURE_SIMD and FEATURE_HW_INTRINSICS for TARGET_WASM and stubs out the minimal necessary pieces of implementation using a new NYI_WASM_SIMD macro and associated JitOption, NyiWasmSimdToR2RUnsupported to prevent crossgen failures due to the presence of intrinsics.

There are a few patterns that showed up commonly which required many ifdef adjustments:

Assuming !TARGET_XARCH -> TARGET_ARM64 if hardware intrinsics are enabled (not the case anymore with wasm)
Assuming FEATURE_HW_INTRINSICS -> FEATURE_MASKED_HW_INTRINSICS (not the case either for Wasm, as Wasm doesn't have any kind of mask register).

Stub HARDWARE_INTRINSIC definitions were added for quite a few xplat Vector128 operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with FEATURE_HARDWARE_INTRINSICS in many places.

…SICS

…s, masked hw intrinsics assumptions

…_HW_INTRINSICS

…tor128 instruction set

…-simd-skeleton

…b during build

…ion during product build

…asm.h and try and make argument counts correct

Copilot

Pull request overview

This PR wires up WebAssembly (Wasm32) support for CoreCLR JIT hardware intrinsics/SIMD at the infrastructure level: new instruction set definitions, JIT/EE interface plumbing, and Wasm-specific stubs/NYI paths to keep R2R/crossgen from failing while the implementation is still incomplete.

Changes:

Add Wasm32 instruction set + ReadyToRun instruction set definitions (WasmBase, PackedSimd, Vector128) and propagate them through the JIT interface/tooling.
Enable FEATURE_SIMD/FEATURE_HW_INTRINSICS for the standalone Wasm JIT build and add initial Wasm-specific HWIntrinsic plumbing (import/lower/codegen stubs and intrinsic lists).
Introduce NYI_WASM_SIMD + a new JitConfig switch and ensure wasm crossgen uses it to convert NYIs into R2R-unsupported skips.

Reviewed changes

Copilot reviewed 32 out of 32 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetGenerator.cs	Maps `Wasm32` to `TARGET_WASM` for generated native ifdefs.
src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt	Adds Wasm32 ISA definitions and R2R bits for WasmBase/PackedSimd.
src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs	Adds Wasm32 instruction sets and implication expansion in managed JIT interface helpers.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs	Maps Wasm32 instruction sets to R2R instruction set enums.
src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs	Adds new R2R enum values for WasmBase/PackedSimd.
src/coreclr/jit/valuenumfuncs.h	Includes Wasm HWIntrinsic VN function defs and defines the HWIntrinsic VN range for Wasm.
src/coreclr/jit/valuenum.cpp	Gates masked-intrinsic VN evaluation/constant folding and adjusts ISA-specific handling for Wasm.
src/coreclr/jit/targetwasm.h	Updates Wasm SIMD register sizing/ABI constants and defines SIMD-related feature macros.
src/coreclr/jit/regset.h	Allows SIMD temp sizing to use FP/SIMD register size on Wasm.
src/coreclr/jit/registeropswasm.cpp	Maps SIMD types to Wasm `v128` and treats v128 as a valid “float” reg kind.
src/coreclr/jit/namedintrinsiclist.h	Adds Wasm HWIntrinsic list inclusion to populate NI_* for Wasm.
src/coreclr/jit/morph.cpp	Adds Wasm NYI stubs and gates masked-intrinsics-specific morphing logic.
src/coreclr/jit/lowerwasm.cpp	Adds Wasm lowering/containment NYI hooks for HWIntrinsic nodes.
src/coreclr/jit/jitconfigvalues.h	Adds `JitWasmSimdNyiToR2RUnsupported` config knob.
src/coreclr/jit/importercalls.cpp	Adjusts intrinsic namespace matching for Wasm and prevents some HWIntrinsic paths on Wasm.
src/coreclr/jit/hwintrinsicwasm.cpp	New Wasm HWIntrinsic helper stubs (lookup ISA, immediates, special imports).
src/coreclr/jit/hwintrinsiclistwasm.h	New Wasm HWIntrinsic list (initial Vector128 cross-platform surface, mostly stubbed).
src/coreclr/jit/hwintrinsiccodegenwasm.cpp	New Wasm HWIntrinsic codegen entrypoint stub.
src/coreclr/jit/hwintrinsic.h	Adds Wasm HWIntrinsic categories/flags and integrates them into common helpers.
src/coreclr/jit/hwintrinsic.cpp	Adds Wasm HWIntrinsic info array + ISA range array entry (currently incomplete).
src/coreclr/jit/gentree.cpp	Adjusts node sizing for Wasm HWIntrinsic nodes and gates masked-intrinsics helpers.
src/coreclr/jit/error.h	Introduces `NYI_WASM_SIMD` macro behavior with R2R-unsupported option.
src/coreclr/jit/compiler.h	Gates masked-intrinsic-only helpers and enables vector-length helpers for Wasm.
src/coreclr/jit/codegenlinear.cpp	Enables multi-op consume logic for Wasm by shifting `#ifndef TARGET_WASM` region.
src/coreclr/jit/codegen.h	Restricts mask-constant overload to masked-intrinsics builds.
src/coreclr/jit/CMakeLists.txt	Enables SIMD/HWIntrinsic defines for Wasm standalone JIT build + adds new Wasm sources.
src/coreclr/jit/assertionprop.cpp	Notes Wasm TODOs for CTZ/CLZ range reasoning.
src/coreclr/jit/abi.cpp	Treats 12-byte FP segments as SIMD register types on Wasm when SIMD enabled.
src/coreclr/inc/readytoruninstructionset.h	Adds native R2R instruction set enum values for WasmBase/PackedSimd.
src/coreclr/inc/jiteeversionguid.h	Updates JIT/EE interface GUID due to instruction set contract changes.
src/coreclr/inc/corinfoinstructionset.h	Adds Wasm CORINFO instruction set enum values and implication validity rules.
src/coreclr/crossgen-corelib.proj	Passes the new SIMD NYI-to-R2R-unsupported config option for wasm crossgen.

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

Copilot

Copilot encountered an error and was unable to review this pull request. You can try again by re-requesting a review.

…for Wasm for the time being

…/runtime into adamperlin/wasm-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 32 out of 32 changed files in this pull request and generated 5 comments.

…-simd-skeleton

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/abi.cpp:131

For Size==12 (Vector3 / TYP_SIMD12), this currently falls through to case 16 and returns TYP_SIMD16. That contradicts the comment for GetRegisterType (“smallest type larger or equal to Size”) and can lose the distinction between SIMD12 vs SIMD16 in later handling (SIMD12 has special casing in multiple backends).

#if defined(FEATURE_SIMD) && defined(TARGET_WASM)
case 12:
#endif
#ifdef FEATURE_SIMD
case 16:
return TYP_SIMD16;
#endif

…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Copilot

Pull request overview

Copilot reviewed 25 out of 25 changed files in this pull request and generated 4 comments.

Comments suppressed due to low confidence (1)

src/coreclr/jit/valuenum.cpp:8359

This switch (ni) case body is no longer properly guarded for TARGET_WASM: the case NI_ArmBase_LeadingZeroCount / case NI_AVX2_LeadingZeroCount labels are removed by the preprocessor, but the { ... return ... } block is still compiled as an unlabeled statement inside the switch. It's currently unreachable, but it's brittle and could become reachable via fallthrough, and it makes the switch structure incorrect for Wasm builds.

#if defined(TARGET_ARM64)
case NI_ArmBase_LeadingZeroCount:
#elif defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
#endif
{
assert(!varTypeIsSmall(type) && !varTypeIsLong(type));

adamperlin · 2026-06-16T15:51:08Z

/ba-g infra failures

adamperlin · 2026-06-16T15:54:15Z

@AndyAyersMS Can you take another look? I've made some pushes since the last review since I had to adjust superpmi collection and replay due to the presence of the new NyiWasmSimd option.

dotnet-policy-service · 2026-06-17T08:18:44Z

Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
See info in area-owners.md if you want to be subscribed.

This is a follow up to #129140, so there is some duplicated diff. This PR enables `FEATURE_SIMD` and `FEATURE_HW_INTRINSICS` for `TARGET_WASM` and stubs out the minimal necessary pieces of implementation using a new `NYI_WASM_SIMD` macro and associated JitOption, `NyiWasmSimdToR2RUnsupported` to prevent crossgen failures due to the presence of intrinsics. There are a few patterns that showed up commonly which required many ifdef adjustments: 1. Assuming `!TARGET_XARCH` -> `TARGET_ARM64` if hardware intrinsics are enabled (not the case anymore with wasm) 2. Assuming `FEATURE_HW_INTRINSICS` -> `FEATURE_MASKED_HW_INTRINSICS` (not the case either for Wasm, as Wasm doesn't have any kind of mask register). Stub `HARDWARE_INTRINSIC` definitions were added for quite a few xplat `Vector128` operations even though these will not be worked on until further in the implementation plan, since the existence of these intrinsics was assumed with `FEATURE_HARDWARE_INTRINSICS` in many places. --------- Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

adamperlin added 16 commits June 1, 2026 17:36

Add Wasm32 WasmBase,PackedSimd instruction set definitions
d76ec49

WIP Get Wasm JIT to compile with SIMD enabled
6c741ec

More HARDWARE_INTRINSIC() stub definitions and ifdef fixes for Wasm SIMD
f8573f3

WIP more changes to get TARGET_WASM to compile with FEATURE_HW_INTRIN…
ebc31df
…SICS

More ifdef changes to morph, valuenum around arch-specific assumption…
bf69792
…s, masked hw intrinsics assumptions

Last JIT changes to get clrjit to compile with TARGET_WASM && FEATURE…
997d4cd
…_HW_INTRINSICS

Update Wasm InstructionSetDesc to rename arch to WASM and declare Vec…
3d2d295
…tor128 instruction set

jit-format
4983314

Use separate NyiWasmSimd config option for NYI_WASM_SIMD()
3b9af51

Merge branch 'main' of github.com:dotnet/runtime into adamperlin/wasm…
8a4d6e0
…-simd-skeleton

Format fix in ReadyToRunInstructionSetHelper.cs
b9cee29

Re-run instruction set generator, small compilation fixes from merge
602c7ba

Fix asserts which came up during compilation of System.Private.CoreLi…
561a6e8
…b during build

Add --codegenopt:JitNyiWasmSimdToR2RUnsupported=1 to crossgen invocat…
f42576d
…ion during product build

jit-format
c8ef653

Add assert to hwintrinsic.cpp, make flags uniform in hwintrinsiclistw…
92df7e7
…asm.h and try and make argument counts correct

CopilotAI review requested due to automatic review settings June 10, 2026 01:10

github-actionsBot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jun 10, 2026

Copilotstarted reviewing on behalf of adamperlin June 10, 2026 01:10 View session

CopilotAI reviewed Jun 10, 2026
View reviewed changes

build-analysisBot mentioned this pull request Jun 10, 2026
[android] Android.Device_Emulator.JIT.Test failing on emulators with CoreCLR #112633
Open

Apply suggestions from code review
f7f01a7
Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>

CopilotAI review requested due to automatic review settings June 10, 2026 18:30

Fix clang build
eac9211

CopilotAI reviewed Jun 10, 2026

adamperlin added 3 commits June 10, 2026 12:13

Merge branch 'main' into adamperlin/wasm-simd-skeleton
ff77001

Review feedback and disable !HWIntrinsicInfo::IsInvalidNodeId assert …
10d7de0
…for Wasm for the time being

Merge branch 'adamperlin/wasm-simd-skeleton' of github.com:adamperlin…
fd54819
…/runtime into adamperlin/wasm-simd-skeleton

CopilotAI review requested due to automatic review settings June 10, 2026 20:01

Copilotstarted reviewing on behalf of adamperlin June 10, 2026 20:02 View session

jit-format
25b945d

CopilotAI review requested due to automatic review settings June 12, 2026 03:19

Copilotstarted reviewing on behalf of adamperlin June 12, 2026 03:20 View session

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View reviewed changes

Comment threadsrc/coreclr/jit/hwintrinsicwasm.cpp
Comment threadsrc/coreclr/jit/lowerwasm.cpp
Comment threadsrc/coreclr/jit/morph.cpp
Comment threadsrc/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs
Comment threadsrc/coreclr/jit/hwintrinsiccodegenwasm.cpp

build-analysisBot mentioned this pull request Jun 12, 2026
Multiple Helix work items fail on maccatalyst/tvos CoreCLR Release #126460
Closed

Merge branch 'main' of github.com:dotnet/runtime into adamperlin/wasm…
4890dba
…-simd-skeleton

This was referenced Jun 12, 2026
CI build failure: error CS8032: An instance of analyzer Microsoft.NetCore.CSharp.Analyzers.... cannot be created #129031
Closed
Arm/Arm64: Segfault in System.Security.Cryptography.Tests#129339
Closed

Properly pass through JitWasmSimdNyiToR2RUnsupported in SuperPMI
8837bee

CopilotAI review requested due to automatic review settings June 12, 2026 23:15

Copilotstarted reviewing on behalf of adamperlin June 12, 2026 23:16 View session

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View reviewed changes

Comment threadsrc/coreclr/jit/hwintrinsiccodegenwasm.cpp
Comment threadsrc/coreclr/jit/lowerwasm.cpp
Comment threadsrc/coreclr/jit/hwintrinsic.cpp
Comment threadsrc/coreclr/jit/valuenum.cpp

build-analysisBot mentioned this pull request Jun 13, 2026
Unable to pull image from mcr.microsoft.com #117164
Closed

adamperlin added 2 commits June 15, 2026 11:18

Add JitWasmSimdNyiToR2RUnsupported option in more places, including u…
d9c4a48
…nconditionally for asmdiffs (temporarily) and for altjit_replay_flags

Apply a few copilot suggestions around NYI'd code
3d85b4b

CopilotAI review requested due to automatic review settings June 15, 2026 20:49

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Comment threadsrc/coreclr/jit/hwintrinsicwasm.cpp
Comment threadsrc/coreclr/jit/gentree.cpp
Comment threadsrc/coreclr/jit/gentree.cpp
Comment threadsrc/coreclr/jit/morph.cpp

adamperlin requested a review from AndyAyersMS June 16, 2026 15:52

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adamperlin merged commit 67df812 into dotnet:mainJun 16, 2026
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adamperlin deleted the adamperlin/wasm-simd-skeleton branch June 16, 2026 16:28

dotnet-maestroBot mentioned this pull request Jun 17, 2026
[main] Source code updates from dotnet/runtime dotnet/dotnet#7196
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pavelsavara added the arch-wasm WebAssembly architecture label Jun 17, 2026

dotnet-milestone-botBot added this to the 11.0-preview6 milestone Jun 17, 2026

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