Add asm! support for MIPS

[tesuji]

For now, I only add support for mips32.
mips64 may come in future PRs if I could learn more about the target.

[rust-highfive]

r? @estebank

(rust_highfive has picked a reviewer for you, use r? to override)

[Amanieu]

I think the crash is because LLVM expects register names to be prefixed with $.

[Amanieu]

For MIPS64 you should add I64. Also most targets support the use of f32 and f64 in general purpose registers for soft-float.

[tesuji]

I'm trying for mips32 BE first. Don't know much about MIPS64, but I'd try in other PR.

[tesuji]

I think the crash is because LLVM expects register names to be prefixed with $.

Still crashed locally for me after changing register names. GDB Backtrace in https://gist.github.com/lzutao/4f8ae72f9e89e1dfc21ff2dcdd890584 . Looks like some kinds of null deref.

[Amanieu]

looks like the crash doesn't happen with llvm-8.

It's just that CI doesn't run these tests since they are marked no-system-llvm.

[tesuji]

Codegen fail at this line:
https://github.com/rust-lang/llvm-project/blob/833dd1e3d4fd350c7c9f6fb2ce0c5f16af7a1e21/llvm/include/llvm/CodeGen/TargetLowering.h#L831

Not sure how to resolve this:

rustc: /checkout/src/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:831: virtual const llvm::TargetRegisterClass* llvm::TargetLoweringBase::getRegClassFor(llvm::MVT, bool) const: Assertion `RC && "This value type is not natively supported!"' failed.

[tesuji]

So here I have more complete backtrack using lldb and release-debuginfo for LLVM:

gdb

warning: used $at (currently $1) without ".set noat"
--> /home/lzutao/fork/rust/worktree/mips/src/test/assembly/asm/mips-types.rs:52:15
|
52 | asm!("move {}, {}", out($class) y, in($class) x);
| ^
|
note: instantiated into assembly here
--> <inline asm>:1:11
|
1 | move $2, $1
| ^
rustc: /home/lzutao/fork/rust/worktree/mips/src/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:831: virtual const llvm::TargetRegisterClass* llvm::TargetLoweringBase::getRegClassFor(llvm::MVT, bool) const: Assertion `RC && "This value type is not natively supported!"' failed.Process 5450 stopped* thread #5, name = 'rustc', stop reason = hit program assert frame #4: 0x00007ffff04c26a3 librustc_driver-ff4867624e9288b7.so`llvm::TargetLoweringBase::getRegClassFor(isDivergent=<unavailable>, VT=<unavailable>, this=<unavailable>) const at TargetLowering.h:831:5 828 virtual const TargetRegisterClass *getRegClassFor(MVT VT, bool isDivergent = false) const { 829 (void)isDivergent; 830 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];-> 831 assert(RC && "This value type is not natively supported!"); 832 return RC; 833 } 834

lldb bt

(lldb) bt
* thread #5, name = 'rustc', stop reason = hit program assert
 frame #0: 0x00007fffee87dfff libc.so.6`__GI_raise(sig=6) at raise.c:51 frame #1: 0x00007fffee87f42a libc.so.6`__GI_abort at abort.c:89 frame #2: 0x00007fffee876e67 libc.so.6`__assert_fail_base(fmt="", assertion=<unavailable>, file=<unavailable>, line=<unavailable>, function=<unavailable>) at assert.c:92 frame #3: 0x00007fffee876f12 libc.so.6`__GI___assert_fail(assertion=<unavailable>, file=<unavailable>, line=<unavailable>, function=<unavailable>) at assert.c:101
* frame #4: 0x00007ffff04c26a3 librustc_driver-ff4867624e9288b7.so`llvm::TargetLoweringBase::getRegClassFor(isDivergent=<unavailable>, VT=<unavailable>, this=<unavailable>) const at TargetLowering.h:831:5 frame #5: 0x00007ffff04ce8b2 librustc_driver-ff4867624e9288b7.so`llvm::MipsTargetLowering::parseRegForInlineAsmConstraint(llvm::StringRef, llvm::MVT) const at MipsISelLowering.cpp:4099:3 frame #6: 0x00007ffff04ce8ad librustc_driver-ff4867624e9288b7.so`llvm::MipsTargetLowering::parseRegForInlineAsmConstraint(this=<unavailable>, C=<unavailable>, VT=<unavailable>) const at MipsISelLowering.cpp:4084 frame #7: 0x00007ffff04e3da0 librustc_driver-ff4867624e9288b7.so`llvm::MipsTargetLowering::getRegForInlineAsmConstraint(this=0x00007fffd80229b0, TRI=0x00007fffd80217c0, Constraint=(Data = "{$8}", Length = 4), VT=(SimpleTy = i8)) const at MipsISelLowering.cpp:4165:54 frame #8: 0x00007ffff12b0242 librustc_driver-ff4867624e9288b7.so`::GetRegistersForValue(DAG=0x00007fffd8001cb0, DL=0x00007fffecb17260, OpInfo=0x00007fffecb173c0, RefOpInfo=0x00007fffecb173c0)::SDISelAsmOperandInfo &, (anonymous namespace)::SDISelAsmOperandInfo &) at SelectionDAGBuilder.cpp:7954:61 frame #9: 0x00007ffff12eafe2 librustc_driver-ff4867624e9288b7.so`llvm::SelectionDAGBuilder::visitInlineAsm(this=0x00007fffd8002780, Call=0x00007fffe81c7060) at SelectionDAGBuilder.cpp:8260:25 frame #10: 0x00007ffff12fc223 librustc_driver-ff4867624e9288b7.so`llvm::SelectionDAGBuilder::visit(this=0x00007fffd8002780, I=0x00007fffe81c7060) at SelectionDAGBuilder.cpp:1141:8 frame #11: 0x00007ffff135e619 librustc_driver-ff4867624e9288b7.so`llvm::SelectionDAGISel::SelectBasicBlock(this=0x00007fffd80016c0, Begin=<unavailable>, End=llvm::BasicBlock::const_iterator @ rbx, HadTailCall=0x00007fffecb18db0) at SelectionDAGISel.cpp:699:17 frame #12: 0x00007ffff1362c62 librustc_driver-ff4867624e9288b7.so`llvm::SelectionDAGISel::SelectAllBasicBlocks(this=0x00007fffd80016c0, Fn=0x00007fffe81baa28) at SelectionDAGISel.cpp:1520:27 frame #13: 0x00007ffff13640d0 librustc_driver-ff4867624e9288b7.so`llvm::SelectionDAGISel::runOnMachineFunction(this=0x00007fffd80016c0, mf=0x00007fffd805c030) at SelectionDAGISel.cpp:504:23 frame #14: 0x00007ffff04c20fb librustc_driver-ff4867624e9288b7.so`llvm::MipsDAGToDAGISel::runOnMachineFunction(this=0x00007fffd80016c0, MF=0x00007fffd805c030) at MipsISelDAGToDAG.cpp:58:52 frame #15: 0x00007ffff16735a5 librustc_driver-ff4867624e9288b7.so`llvm::MachineFunctionPass::runOnFunction(this=0x00007fffd80016c0, F=0x00007fffe81baa28) at MachineFunctionPass.cpp:73:33 frame #16: 0x00007ffff23f1b33 librustc_driver-ff4867624e9288b7.so`llvm::FPPassManager::runOnFunction(this=0x00007fffd8007fb0, F=0x00007fffe81baa28) at LegacyPassManager.cpp:1587:40 frame #17: 0x00007ffff23f2181 librustc_driver-ff4867624e9288b7.so`llvm::FPPassManager::runOnModule(this=0x00007fffd8007fb0, M=0x00007fffe8101080) at LegacyPassManager.cpp:1629:29 frame #18: 0x00007ffff23f0ace librustc_driver-ff4867624e9288b7.so`llvm::legacy::PassManagerImpl::run(llvm::Module&) at LegacyPassManager.cpp:1698:38 frame #19: 0x00007ffff23f0861 librustc_driver-ff4867624e9288b7.so`llvm::legacy::PassManagerImpl::run(this=0x00007fffd8000960, M=0x00007fffe8101080) at LegacyPassManager.cpp:614 frame #20: 0x00007fffefd9cf55 librustc_driver-ff4867624e9288b7.so`LLVMRustWriteOutputFile + 581 frame #21: 0x00007fffefd69548 librustc_driver-ff4867624e9288b7.so`rustc_codegen_llvm::back::write::write_output_file::h8f8e8512ef3d7b66 + 88 frame #22: 0x00007fffefc16907 librustc_driver-ff4867624e9288b7.so`rustc_codegen_llvm::back::write::codegen::with_codegen::h2785a5280d050ea5 + 119 frame #23: 0x00007fffefd6cc73 librustc_driver-ff4867624e9288b7.so`rustc_codegen_llvm::back::write::codegen::h1dcdb5946b72520a + 2899 frame #24: 0x00007fffefd0beeb librustc_driver-ff4867624e9288b7.so`rustc_codegen_ssa::back::write::finish_intra_module_work::h63ef7bb6d09628bd + 219 frame #25: 0x00007fffefd06fa9 librustc_driver-ff4867624e9288b7.so`rustc_codegen_ssa::back::write::execute_work_item::hfe14f77f2358639e + 2745 frame #26: 0x00007fffefc17ca2 librustc_driver-ff4867624e9288b7.so`std::sys_common::backtrace::__rust_begin_short_backtrace::h7e5ec54f2af1c982 + 194 frame #27: 0x00007fffefd87c5a librustc_driver-ff4867624e9288b7.so`std::panicking::try::h9dc227032d219e6e + 42 frame #28: 0x00007fffefc0435d librustc_driver-ff4867624e9288b7.so`core::ops::function::FnOnce::call_once$u7b$$u7b$vtable.shim$u7d$$u7d$::h0fb2f699d71f4606 + 93 frame #29: 0x00007fffeec56278 libstd-43e93f8b75aa198d.so`_$LT$alloc..boxed..Box$LT$F$GT$$u20$as$u20$core..ops..function..FnOnce$LT$A$GT$$GT$::call_once::h2e60e5e0bf1169eb + 24 frame #30: 0x00007fffeec6bd1a libstd-43e93f8b75aa198d.so`std::sys::unix::thread::Thread::new::thread_start::h46685771fe1620e2 + 26 frame #31: 0x00007fffee00f4a4 libpthread.so.0`start_thread(arg=0x00007fffecb1b700) at pthread_create.c:456 frame #32: 0x00007fffee933d0f libc.so.6`__clone at clone.S:97

[tesuji]

I can reproduce the issue. It seems that the generated LLVM-IR missing r modifiers.
Instead of

%0 = calli8asmsideeffectalignstack"move $$t0, $$t0", "={$8},{$8},~{memory}"(i8%x), !srcloc!2

it should be

%0 = calli8asmsideeffectalignstack"move $$t0, $$t0", "=r{$8},r{$8},~{memory}"(i8%x), !srcloc!2

With r modifiers, the codegen doesn't crash anymore.

LLVM IR and minimal Rust code example that with current state of this PR crashed the codegen: https://rust.godbolt.org/z/c64qG7
llvm_asm! doesn't crash and its llvm-ir contains r modifiers: https://rust.godbolt.org/z/bcrvnG

[Amanieu]

Adding the r modifier is wrong: it allows LLVM to use any register instead of just $8. The problem is that LLVM's MIPS backend doesn't support i8 and i16 with inline assembly. Clang has the same issue.

[tesuji]

Adding the r modifier is wrong: it allows LLVM to use any register instead of just $8.

Oops, you're right.

Adding the r modifier is wrong: it allows LLVM to use any register instead of just $8. The problem is that LLVM's MIPS backend doesn't support i8 and i16 with inline assembly. Clang has the same issue.

Are there any bugs in bugs.llvm.org/ or this is an intentional design ?
I guess like you said in zulip, we should hack on our side to convert from/to u32.

(Also I currently cannot reply on zulip. The network at night is slow or having issues, I cannot connect to zulip at all).

[Amanieu]

We already have a lot of workarounds for LLVM not accepting certain types, we can just add one more.

You'll need to add:

• llvm_fixup_input: sign-extend i8 and i16 to i32 (sign-extension is cheaper on MIPS than zero-extension).
• llvm_fixup_output: truncate i32 outputs back down to i8 or i16.
• llvm_fixup_output_type: use i32 in place of i8 or i16.

You'll also want to add support for f32 (fixup by bitcasting to i32) and i64/f64 for MIPS64.

Finally you should update the asm documentation in src/doc/unstable-book/src/library-features/asm.md.

[tesuji]

You'll also want to add support for f32 (fixup by bitcasting to i32) and i64/f64 for MIPS64.

I prefer to do this later, in another PR because I only have a little knowledge for MIPS32 I learned in school.

[tesuji]

Should we do zero-extend for u8 or u16 ?

[Amanieu]

No. The asm! documentation specifies that the upper bits of a register are undefined when you pass a smaller value in. So we can do either.

I just ran a few tests on godbolt and it turns out that zero-extension can always be done in 1 instruction while sign-extension sometimes needs 2 (unlike what my previous comment said). You should change this to always zero-extend.

[Amanieu]

Hmm this is probably confusing since I change my mind halfway through the comment. But basically it doesn't really matter if you sext or zext from the spec point of view.

[tesuji]

Finally you should update the asm documentation in src/doc/unstable-book/src/library-features/asm.md.

Which ones you want me to write there? Should I write about LLVM restrictions on i8/i16
and we auto-zero-extend the input arguments to i32 ?

[Amanieu]

Just update the various tables with MIPS details. I don't think any other changes are needed.

The existing spec is clear enough for the case of values smaller than a register. We don't want to guarantee zero extension since this may change in the future if LLVM gets proper support for i8/i16.

[Amanieu]

I think you should just use ${{[0-9]+}} for the register class tests like we do for the other architectures. This avoids issues in the future when the register allocator picks a different register.

[tesuji]

I want to limit what registers the assembler is able to generate based on general calling convention.
But maybe it is not important here. I'll replace it if you think so.

[Amanieu]

Well, what we're really testing here is that the LLVM backend doesn't choke on types it can't support. The actual register number is not important, only that some register is chosen.

[Amanieu]

LGTM

[tesuji]

Squashed.

[Amanieu]

@bors r+

[bors]

📌 Commit 9000710 has been approved by Amanieu

[bors]

⌛ Testing commit 9000710 with merge 46d58327c4a259163e2a0f7f4e69b3d74e24bfe6...

[bors]

💔 Test failed - checks-actions

[tesuji]

curl: (56) SSLRead() return error -9806
clang+llvm-10.0.0-x86_64-apple-darwin/lib/libLLVMX86CodeGen.a: Lzma library error: No progress is possible
tar: Error exit delayed from previous errors.

from build log: https://github.com/rust-lang-ci/rust/runs/1172123270

[kennytm]

@bors retry