Uh oh!
There was an error while loading. Please reload this page.
Enclave TCS control - #78772
Conversation
rust-highfive
commented
Nov 5, 2020
r? @cramertj (rust_highfive has picked a reviewer for you, use r? to override) |
2be7bd8 to
d4fdbfcCompareraoulstrackx
commented
Nov 6, 2020
Blocked by fortanix/rust-sgx#300 |
bors
commented
Nov 17, 2020
☔ The latest upstream changes (presumably #79128) made this pull request unmergeable. Please resolve the merge conflicts. Note that reviewers usually do not review pull requests until merge conflicts are resolved! Once you resolve the conflicts, you should change the labels applied by bors to indicate that your PR is ready for review. Post this as a comment to change the labels: |
jethrogb
commented
Nov 18, 2020
Review can be delegated to me |
This comment has been minimized.
This comment has been minimized.
3218edc to
5905f39Compare
This comment has been minimized.
This comment has been minimized.
bors
commented
May 7, 2021
☔ The latest upstream changes (presumably #85014) made this pull request unmergeable. Please resolve the merge conflicts. |
5905f39 to
df7a9bdComparedf7a9bd to
b83f5acComparerust-log-analyzer
commented
Jul 21, 2021
The job Click to see the possible cause of the failure (guessed by this bot) |
bors
commented
Oct 23, 2021
☔ The latest upstream changes (presumably #90188) made this pull request unmergeable. Please resolve the merge conflicts. |
| @@ -1,55 +1,55 @@ | |||
| # This is based on https://github.com/japaric/rust-everywhere/blob/master/appveyor.yml | |||
Mark-Simulacrum
commented
Feb 16, 2022
I'm going to go ahead and close this PR, but please feel free to reopen or re-file when the upstream blocking concerns are addressed. Thanks! |
Intel SGXv2 enables the dynamic creation of TCSes. To use this correctly, the enclave needs to be in charge of controlling which TCS will be used for new threads. This PR implements such control for SGXv1 enclaves, as a preliminary step for SGXv2 support.
cc: @jethrogb