ace: power policy management

app/boards/intel_adsp_ace15_mtpm.conf

@@ -10,6 +10,10 @@ CONFIG_COMP_SRC=y
 
 CONFIG_COMP_SRC_IPC4_FULL_MATRIX=y
 
+# power settings
+CONFIG_PM=y
+CONFIG_PM_POLICY_CUSTOM=y
+
 # enable Zephyr drivers
 CONFIG_ZEPHYR_NATIVE_DRIVERS=y
 CONFIG_DAI=y
@@ -54,10 +58,8 @@ CONFIG_INTEL_ADSP_IPC=y
 
 # Temporary disabled options
 CONFIG_TRACE=n
-CONFIG_PM=n
 CONFIG_PM_DEVICE=y
 CONFIG_PM_DEVICE_RUNTIME=y
 CONFIG_PM_DEVICE_POWER_DOMAIN=n
-CONFIG_PM_POLICY_CUSTOM=n
 CONFIG_COMP_KPB=n
 

src/lib-zephyr/cpu.c

@@ -123,6 +123,7 @@ int cpu_enabled_cores(void)
 
 #else /* CONFIG_ACE */
 #include <sof/trace/trace.h>
+#include <rtos/wait.h>
 #include <zephyr/pm/pm.h>
 
 LOG_MODULE_DECLARE(zephyr, CONFIG_SOF_LOG_LEVEL);

src/platform/intel/ace/lib/pm_runtime.c

@@ -9,12 +9,82 @@
 #include <sof_versions.h>
 #include <stdint.h>
 
+#include <ace_v1x-regs.h>
+#include <zephyr/pm/policy.h>
+
 /* 76cc9773-440c-4df9-95a8-72defe7796fc */
 DECLARE_SOF_UUID("power", power_uuid, 0x76cc9773, 0x440c, 0x4df9,
  0x95, 0xa8, 0x72, 0xde, 0xfe, 0x77, 0x96, 0xfc);
 
 DECLARE_TR_CTX(power_tr, SOF_UUID(power_uuid), LOG_LEVEL_INFO);
 
+#if defined(CONFIG_PM_POLICY_CUSTOM)
+const struct pm_state_info *pm_policy_next_state(uint8_t cpu, int32_t ticks)
+{
+	unsigned int num_cpu_states;
+	const struct pm_state_info *cpu_states;
+
+	num_cpu_states = pm_state_cpu_get_all(cpu, &cpu_states);
+
+	for (int i = num_cpu_states - 1; i >= 0; i--) {
+ const struct pm_state_info *state = &cpu_states[i];
+ uint32_t min_residency, exit_latency;
+
+ /* policy cannot lead to D3 */
+ if (state->state == PM_STATE_SOFT_OFF)
+ continue;
+
+ /* check if there is a lock on state + substate */
+ if (pm_policy_state_lock_is_active(state->state, state->substate_id))
+ continue;
+
+ if (state->state == PM_STATE_RUNTIME_IDLE) {
+ /* No D0i3 when secondary cores are active! */
+ if (cpu_enabled_cores() & ~BIT(PLATFORM_PRIMARY_CORE_ID))
+ continue;
+ }
+
+ min_residency = k_us_to_ticks_ceil32(state->min_residency_us);
+ exit_latency = k_us_to_ticks_ceil32(state->exit_latency_us);
+
+ if (ticks == K_TICKS_FOREVER ||
+ (ticks >= (min_residency + exit_latency))) {
+ /* TODO: PM_STATE_RUNTIME_IDLE requires substates to be defined
+ * to handle case with enabled PG andf disabled CG.
+ */
+ return state;
+ }
+	}
+
+	return NULL;
+}
+#endif /* CONFIG_PM_POLICY_CUSTOM */
+
+void platform_pm_runtime_enable(uint32_t context, uint32_t index)
+{
+	switch (context) {
+	case PM_RUNTIME_DSP:
+ pm_policy_state_lock_put(PM_STATE_RUNTIME_IDLE, PM_ALL_SUBSTATES);
+ break;
+	default:
+ break;
+	}
+}
+
+void platform_pm_runtime_disable(uint32_t context, uint32_t index)
+{
+	switch (context) {
+	case PM_RUNTIME_DSP:
+ pm_policy_state_lock_get(PM_STATE_RUNTIME_IDLE, PM_ALL_SUBSTATES);
+ /* Disable power gating when preventing */
+ DFDSPBRCP.bootctl[PLATFORM_PRIMARY_CORE_ID].bctl |=
+ DFDSPBRCP_BCTL_WAITIPCG | DFDSPBRCP_BCTL_WAITIPPG;
+ break;
+	default:
+ break;
+	}
+}
+
 void platform_pm_runtime_init(struct pm_runtime_data *prd)
 { }
 

zephyr/wrapper.c

@@ -25,6 +25,7 @@
 /* Zephyr includes */
 #include <zephyr/device.h>
 #include <zephyr/kernel.h>
+#include <zephyr/pm/policy.h>
 #include <version.h>
 #include <zephyr/sys/__assert.h>
 #include <soc.h>
@@ -624,7 +625,10 @@ int task_main_start(struct sof *sof)
  * (only called from single core, no RMW lock)
  */
 	__ASSERT_NO_MSG(cpu_get_id() == PLATFORM_PRIMARY_CORE_ID);
-
+#if defined(CONFIG_PM)
+	pm_policy_state_lock_get(PM_STATE_RUNTIME_IDLE, PM_ALL_SUBSTATES);
+	pm_policy_state_lock_get(PM_STATE_SOFT_OFF, PM_ALL_SUBSTATES);
+#endif
 	/* let host know DSP boot is complete */
 	ret = platform_boot_complete(0);