Open-source, license-free MCP server for RTL waveform debug: reads FST waveforms (VCD/FSDB auto-convert) plus a SystemVerilog netlist, with 34 tools covering driver analysis, value/X tracing, pass-fail waveform diff, a browser wave viewer the agent drives, and pre-simulation static analysis.
Open-source, evidence-driven MCP server for RTL simulation debugging: correlate VCS/Xcelium logs, VCD/FSDB waveforms, SystemVerilog/UVM source, hierarchy, and connectivity to trace failures to root cause.
A framework for building hardware verification platform using software method
Open Verification Platform Teaching Course, aimed at enabling students to master the basic skills of participating in open hardware verification, implemented based on the Docsy theme.
UVM verification of a programmable egress QoS scheduler — SP/WRR arbitration, reference model, SVA, coverage
Specman/e UVC for a credit-based multi-flow arbiter — independent checker, constrained traffic, Xcelium integration
Computer Engineering graduate building chip verification skills from scratch — C++, Digital Logic Design, SystemVerilog, RISC-V | Targeting NCDC/NUST Chip Verification Training & M.Sc. FAU Erlangen-Nürnberg, Germany | 2am–5am daily | Kamalia, Pakistan → Germany 🇩🇪
Mixed-language UVM + VHDL networking cluster — dual-clock buffer, end-to-end scoreboard, live config
Mentor Graphics — independent third-party profile of a public API surface, by API Evangelist. Mentor Graphics was a leading electronic design automation (EDA) software vendor whose tools span integrated-circuit design and verification, PCB and electronic-systems design, and manufacturing analysis. Battery Ventures held a position in the company.
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