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[WIP] Add Fused Attention for FP8 - #128

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[WIP] Add Fused Attention for FP8#128
cyanguwa wants to merge 80 commits into
NVIDIA:mainfrom
cyanguwa:fp8_flash_attn

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@cyanguwacyanguwa commented Apr 3, 2023

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ptrendxand others added 30 commits March 31, 2023 12:59
@ptrendx@cyanguwa
Add people to TE CI
0f0370b
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Fix the link to the documentation archives (NVIDIA#91)
94ee69a
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
deprecate qk layer scaling and fp32 softmax args (NVIDIA#90)
e385666
* deprecate qk layer scaling and fp32 softmax args
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* apply QK layer scaling for fp16 training
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Move from Sphinx Autodoc to sphinx-autoapi (NVIDIA#92)
0cb784a
* Change from AutoDoc to AutoAPI
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fixes
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* WAR for the wrong autosummary generation
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* Change common to be in line with pytorch API docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Add GitHub Action to build docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fix
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Trying to fix the versions
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
---------
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnn_fmha_fp8 module and extensions call; compile sucessfully
0bd7b24
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add python/pytorch calls to c++ funcs; fix fp8/fp16/bf16 branching lo…
833bf92
…cation in .cu; compile successfully
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add simple test; unsuccessful run
f8c98b9
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clear up file/func names; create pytorch modules/DPA calls; WIP
6b6399d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update PyTorch modules; compiles; WIP
e466b66
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Raise autocast usage error (NVIDIA#93)
f8fe0ee
* catch incorrect usage of fp8_autocast
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* catch error on first time double execution
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Catch FP8 modulo16 error before cublas and fp8 kernels (NVIDIA#97)
022bea6
* Catch FP8 modulo16 error before cublas and fp8 kernels
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* annotate
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding documents to TE/JAX (NVIDIA#87)
570ac8c
* Updated TE/JAX docs
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adding TE/JAX docs' rst files
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Set DType as pybind11::module_local() to avoid generic_type errors.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Updating license and exporting more modules
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adopting autoapi and removing enum_tools.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Fix typo
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Make jax.rst be style consistent.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from code review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Update the description of Softmax
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Removed categories in catalog as PyTorch
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming Huang <mingh@nvidia.com>
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
still fprop only; replace R
cf48483
CP with RECIPROCAL and update cudnn_frontend version
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update fprop and add bprop (uncomplte); add cudnn plan caching; compiles
fdaa2d8
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace logic (WIP)
6849d6b
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Update PyTorch comm API (NVIDIA#100)
f45d545
Use updated comm API PyTorch
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update the interface of fwd calls; consistent with mlperf; compiles
6eaa7b4
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox state component of the code
5efae6f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox by using tensor adds/concats
5c87b1d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace calculation and its return for allocateSpace
c8cb301
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding JAX to README.rst (NVIDIA#98)
e3b825f
* Adding JAX to README.rst
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine README.rst as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine the API doc of extend_logical_axis_rules.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add bprop sample to cudnn fmha fp8 and create pytorch extension; comp…
7c1e2b5
…iles
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@nzmora-nvidia@timmoon10@cyanguwa
Add a temporary workaround to layernorm ONNX export (NVIDIA#95)
b1e077c
* Add a temporary workaround to layernorm export
Seems like ORT is performing template-matching for LN and incorrectly concludes
that it doesn't have a kernel for FP32 LN. The work-around adds the addition of
fake_zero which is meant to prevent the template matching while keeping the graph
virtually unchanged. This also requires `do_constant_folding=False` in
`torch.onnx.export`.
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Adjust test threshold
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Opened an ORT bug and added the link for tracking
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix Python linter errors
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Simplify the LN workaround solution (ONNX export)
After discussing microsoft/onnxruntime#15021
with Microsoft engineers, replaced the LN workaround with a simpler
implementation.
In addition:
* To make test more robust add `allow_cnt_errors` to `validate_result`
* Add more documentation to clarify the purpose and methodology of the
ONNX export tests
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
---------
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Co-authored-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Relax dimension checks for fp8 exec (NVIDIA#106)
31a2c7b
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@vasunvidia@cyanguwa
Initial commit for fp8_transpose_dbias kernel
ef3cde4
Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
WIP: fix interfaces; compiles; runtime cudnn ragged offset desc error
d0e241a
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Improve PyTorch test harness (NVIDIA#102)
1ed8bae
* add layernorm1p fp8 test
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* combine tests for easy maintenance
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* using torch.autocast for AMP and check grad types
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for wgrad accumulation fusion
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* rename file
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Setup numerical tests + SAR
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for full activation recompute
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add tests for checkpoint load/store
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* TE vs framework numerical tests
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* fix ci
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* relax thresholds
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Publish nightly version of the documentation
210d8f2
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@timmoon10@cyanguwa
Use 4B vector loads/stores in cast-transpose kernel for small matrices (
978c2de
NVIDIA#101)
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Changed version to 0.8.0dev
334cc9d
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
tcherckez-nvidiaand others added 25 commits March 31, 2023 13:03
@tcherckez-nvidia@ksivaman@cyanguwa
Fix FlashAttention tests (NVIDIA#99)
295ed0f
Signed-off-by: Tal Cherckez <tcherckez@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup setup.py
2971eba
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn handle creation out of bprop/bprop; runs; WIP
24885e6
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnnDestroy to pytorch extension
6e6ca3d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@nzmora-nvidia@cyanguwa
Change FP8 recipe defaults (NVIDIA#112)
a0592b3
* Change FP8 recipe defaults
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Increase default amax history length
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Always check history size
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* no amax history for onnx export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* revert onnx export test changes
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Fix indices in onnx test
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clean workspace size; remove bprop debug comments
b0e4a7f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn plan manager from pytorch/csrc to common/fused_attn
f72623c
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
simplify philox seed/offset extraction using one CUDA kernel
e1a89c3
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Fix segfault during onnx export (NVIDIA#126)
4178b39
* Fix segfault during GeLU export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
replace cu_seqlens with qkv_ragged_offset in fused_attn_fwd/bwd
46de93f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup comments from last 3 commits
49f85c2
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix coding style to pass lint; WIP
38bde38
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix fused_attn_fp8.cu for lint; success; compiles and runs correctly
9b06144
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'main' into fp8_flash_attn
d214dfc
Signed-off-by: cyanguwa <cyang.uwa@gmail.com>
@cyanguwa
further remove cudnn fused attn from transformer.py
4997939
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'fp8_flash_attn' of github.com:cyanguwa/TransformerEngin…
a7f9417
…e into fp8_flash_attn
@cyanguwa
remove certain transformer module changes to focus this PR on cpp_ext…
4685a7d
…ensions
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
remove duplicate arch checks in fp8 kernels
2f73f87
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
further fix coding style to pass lint for Python
a6c090e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix indents, commenting; remove total_seqs in some fwd/bwd calls
c76892e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
modify setup.py to accept external include/lib paths for cuda/cudnn/c…
28d3e93
…udnn_frontend
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
revert to cu_seqlens from qkv_ragged_offset in fwd/bwd api
1297a3e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
reorganize ops in cudnn graph
4dc0eb0
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix last commit and remove dependency on cudnn_all
e508591
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cuDNN path hints for cmake
5660e72
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx

ptrendx commented Apr 17, 2023

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Requires NVIDIA/cudnn-frontend#44

@cyanguwa

cyanguwa commented Apr 17, 2023

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Replaced by PR #155.

@cyanguwa
cyanguwa deleted the fp8_flash_attn branch February 22, 2024 00:15
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@cyanguwa@ptrendx@ksivaman@mingxu1067@nzmora-nvidia@vasunvidia@timmoon10@trevor-m@jeng1220@tcherckez-nvidia
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[WIP] Add Fused Attention for FP8 by cyanguwa · Pull Request #128 · NVIDIA/TransformerEngine · GitHub
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[WIP] Add Fused Attention for FP8 - #128
Closed
cyanguwa wants to merge 80 commits into
NVIDIA:mainfrom 
cyanguwa:fp8_flash_attn
Closed
[WIP] Add Fused Attention for FP8#128
cyanguwa wants to merge 80 commits into
NVIDIA:mainfrom 
cyanguwa:fp8_flash_attn
Conversation
@cyanguwa
@cyanguwacyanguwa
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Apr 3, 2023

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 No description provided. 
ptrendxand others
added 30 commits
March 31, 2023 12:59
@ptrendx@cyanguwa
Add people to TE CI
0f0370b
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Fix the link to the documentation archives (NVIDIA#91)
94ee69a
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
deprecate qk layer scaling and fp32 softmax args (NVIDIA#90)
e385666
* deprecate qk layer scaling and fp32 softmax args
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* apply QK layer scaling for fp16 training
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Move from Sphinx Autodoc to sphinx-autoapi (NVIDIA#92)
0cb784a
* Change from AutoDoc to AutoAPI
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fixes
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* WAR for the wrong autosummary generation
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* Change common to be in line with pytorch API docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Add GitHub Action to build docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fix
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Trying to fix the versions
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
---------
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnn_fmha_fp8 module and extensions call; compile sucessfully
0bd7b24
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add python/pytorch calls to c++ funcs; fix fp8/fp16/bf16 branching lo…
833bf92
…cation in .cu; compile successfully
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add simple test; unsuccessful run
f8c98b9
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clear up file/func names; create pytorch modules/DPA calls; WIP
6b6399d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update PyTorch modules; compiles; WIP
e466b66
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Raise autocast usage error (NVIDIA#93)
f8fe0ee
* catch incorrect usage of fp8_autocast
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* catch error on first time double execution
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Catch FP8 modulo16 error before cublas and fp8 kernels (NVIDIA#97)
022bea6
* Catch FP8 modulo16 error before cublas and fp8 kernels
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* annotate
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding documents to TE/JAX (NVIDIA#87)
570ac8c
* Updated TE/JAX docs
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adding TE/JAX docs' rst files
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Set DType as pybind11::module_local() to avoid generic_type errors.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Updating license and exporting more modules
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adopting autoapi and removing enum_tools.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Fix typo
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Make jax.rst be style consistent.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from code review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Update the description of Softmax
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Removed categories in catalog as PyTorch
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming Huang <mingh@nvidia.com>
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
still fprop only; replace R
cf48483
CP with RECIPROCAL and update cudnn_frontend version
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update fprop and add bprop (uncomplte); add cudnn plan caching; compiles
fdaa2d8
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace logic (WIP)
6849d6b
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Update PyTorch comm API (NVIDIA#100)
f45d545
Use updated comm API PyTorch
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update the interface of fwd calls; consistent with mlperf; compiles
6eaa7b4
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox state component of the code
5efae6f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox by using tensor adds/concats
5c87b1d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace calculation and its return for allocateSpace
c8cb301
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding JAX to README.rst (NVIDIA#98)
e3b825f
* Adding JAX to README.rst
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine README.rst as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine the API doc of extend_logical_axis_rules.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add bprop sample to cudnn fmha fp8 and create pytorch extension; comp…
7c1e2b5
…iles
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@nzmora-nvidia@timmoon10@cyanguwa
Add a temporary workaround to layernorm ONNX export (NVIDIA#95)
b1e077c
* Add a temporary workaround to layernorm export
Seems like ORT is performing template-matching for LN and incorrectly concludes
that it doesn't have a kernel for FP32 LN. The work-around adds the addition of
fake_zero which is meant to prevent the template matching while keeping the graph
virtually unchanged. This also requires `do_constant_folding=False` in
`torch.onnx.export`.
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Adjust test threshold
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Opened an ORT bug and added the link for tracking
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix Python linter errors
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Simplify the LN workaround solution (ONNX export)
After discussing microsoft/onnxruntime#15021
with Microsoft engineers, replaced the LN workaround with a simpler
implementation.
In addition:
* To make test more robust add `allow_cnt_errors` to `validate_result`
* Add more documentation to clarify the purpose and methodology of the
ONNX export tests
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
---------
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Co-authored-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Relax dimension checks for fp8 exec (NVIDIA#106)
31a2c7b
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@vasunvidia@cyanguwa
Initial commit for fp8_transpose_dbias kernel
ef3cde4
Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
WIP: fix interfaces; compiles; runtime cudnn ragged offset desc error
d0e241a
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Improve PyTorch test harness (NVIDIA#102)
1ed8bae
* add layernorm1p fp8 test
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* combine tests for easy maintenance
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* using torch.autocast for AMP and check grad types
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for wgrad accumulation fusion
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* rename file
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Setup numerical tests + SAR
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for full activation recompute
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add tests for checkpoint load/store
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* TE vs framework numerical tests
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* fix ci
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* relax thresholds
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Publish nightly version of the documentation
210d8f2
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@timmoon10@cyanguwa
Use 4B vector loads/stores in cast-transpose kernel for small matrices (
978c2de
NVIDIA#101)
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Changed version to 0.8.0dev
334cc9d
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
tcherckez-nvidiaand others
added 25 commits
March 31, 2023 13:03
@tcherckez-nvidia@ksivaman@cyanguwa
Fix FlashAttention tests (NVIDIA#99)
295ed0f
Signed-off-by: Tal Cherckez <tcherckez@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup setup.py
2971eba
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn handle creation out of bprop/bprop; runs; WIP
24885e6
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnnDestroy to pytorch extension
6e6ca3d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@nzmora-nvidia@cyanguwa
Change FP8 recipe defaults (NVIDIA#112)
a0592b3
* Change FP8 recipe defaults
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Increase default amax history length
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Always check history size
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* no amax history for onnx export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* revert onnx export test changes
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Fix indices in onnx test
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clean workspace size; remove bprop debug comments
b0e4a7f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn plan manager from pytorch/csrc to common/fused_attn
f72623c
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
simplify philox seed/offset extraction using one CUDA kernel
e1a89c3
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Fix segfault during onnx export (NVIDIA#126)
4178b39
* Fix segfault during GeLU export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
replace cu_seqlens with qkv_ragged_offset in fused_attn_fwd/bwd
46de93f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup comments from last 3 commits
49f85c2
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix coding style to pass lint; WIP
38bde38
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix fused_attn_fp8.cu for lint; success; compiles and runs correctly
9b06144
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'main' into fp8_flash_attn
d214dfc
Signed-off-by: cyanguwa <cyang.uwa@gmail.com>
@cyanguwa
further remove cudnn fused attn from transformer.py
4997939
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'fp8_flash_attn' of github.com:cyanguwa/TransformerEngin…
a7f9417
…e into fp8_flash_attn
@cyanguwa
remove certain transformer module changes to focus this PR on cpp_ext…
4685a7d
…ensions
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
remove duplicate arch checks in fp8 kernels
2f73f87
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
further fix coding style to pass lint for Python
a6c090e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix indents, commenting; remove total_seqs in some fwd/bwd calls
c76892e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
modify setup.py to accept external include/lib paths for cuda/cudnn/c…
28d3e93
…udnn_frontend
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
revert to cu_seqlens from qkv_ragged_offset in fwd/bwd api
1297a3e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
reorganize ops in cudnn graph
4dc0eb0
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix last commit and remove dependency on cudnn_all
e508591
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cuDNN path hints for cmake
5660e72
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx
ptrendx
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Apr 17, 2023

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Requires NVIDIA/cudnn-frontend#44
@cyanguwa
cyanguwa
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Apr 17, 2023

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Replaced by PR #155.
@cyanguwa
cyanguwa
deleted the

fp8_flash_attn

branch
February 22, 2024 00:15
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@cyanguwa@ptrendx@ksivaman@mingxu1067@nzmora-nvidia@vasunvidia@timmoon10@trevor-m@jeng1220@tcherckez-nvidia

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[WIP] Add Fused Attention for FP8 by cyanguwa · Pull Request #128 · NVIDIA/TransformerEngine · GitHub
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[WIP] Add Fused Attention for FP8 - #128
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cyanguwa wants to merge 80 commits into
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cyanguwa:fp8_flash_attn
Closed
[WIP] Add Fused Attention for FP8#128
cyanguwa wants to merge 80 commits into
NVIDIA:mainfrom 
cyanguwa:fp8_flash_attn
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@cyanguwa
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Apr 3, 2023

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 No description provided. 
ptrendxand others
added 30 commits
March 31, 2023 12:59
@ptrendx@cyanguwa
Add people to TE CI
0f0370b
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Fix the link to the documentation archives (NVIDIA#91)
94ee69a
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
deprecate qk layer scaling and fp32 softmax args (NVIDIA#90)
e385666
* deprecate qk layer scaling and fp32 softmax args
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* apply QK layer scaling for fp16 training
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Move from Sphinx Autodoc to sphinx-autoapi (NVIDIA#92)
0cb784a
* Change from AutoDoc to AutoAPI
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fixes
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* WAR for the wrong autosummary generation
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* Change common to be in line with pytorch API docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Add GitHub Action to build docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fix
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Trying to fix the versions
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
---------
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnn_fmha_fp8 module and extensions call; compile sucessfully
0bd7b24
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add python/pytorch calls to c++ funcs; fix fp8/fp16/bf16 branching lo…
833bf92
…cation in .cu; compile successfully
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add simple test; unsuccessful run
f8c98b9
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clear up file/func names; create pytorch modules/DPA calls; WIP
6b6399d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update PyTorch modules; compiles; WIP
e466b66
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Raise autocast usage error (NVIDIA#93)
f8fe0ee
* catch incorrect usage of fp8_autocast
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* catch error on first time double execution
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Catch FP8 modulo16 error before cublas and fp8 kernels (NVIDIA#97)
022bea6
* Catch FP8 modulo16 error before cublas and fp8 kernels
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* annotate
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding documents to TE/JAX (NVIDIA#87)
570ac8c
* Updated TE/JAX docs
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adding TE/JAX docs' rst files
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Set DType as pybind11::module_local() to avoid generic_type errors.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Updating license and exporting more modules
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adopting autoapi and removing enum_tools.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Fix typo
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Make jax.rst be style consistent.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from code review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Update the description of Softmax
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Removed categories in catalog as PyTorch
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming Huang <mingh@nvidia.com>
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
still fprop only; replace R
cf48483
CP with RECIPROCAL and update cudnn_frontend version
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update fprop and add bprop (uncomplte); add cudnn plan caching; compiles
fdaa2d8
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace logic (WIP)
6849d6b
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Update PyTorch comm API (NVIDIA#100)
f45d545
Use updated comm API PyTorch
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update the interface of fwd calls; consistent with mlperf; compiles
6eaa7b4
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox state component of the code
5efae6f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox by using tensor adds/concats
5c87b1d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace calculation and its return for allocateSpace
c8cb301
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding JAX to README.rst (NVIDIA#98)
e3b825f
* Adding JAX to README.rst
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine README.rst as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine the API doc of extend_logical_axis_rules.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add bprop sample to cudnn fmha fp8 and create pytorch extension; comp…
7c1e2b5
…iles
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@nzmora-nvidia@timmoon10@cyanguwa
Add a temporary workaround to layernorm ONNX export (NVIDIA#95)
b1e077c
* Add a temporary workaround to layernorm export
Seems like ORT is performing template-matching for LN and incorrectly concludes
that it doesn't have a kernel for FP32 LN. The work-around adds the addition of
fake_zero which is meant to prevent the template matching while keeping the graph
virtually unchanged. This also requires `do_constant_folding=False` in
`torch.onnx.export`.
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Adjust test threshold
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Opened an ORT bug and added the link for tracking
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix Python linter errors
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Simplify the LN workaround solution (ONNX export)
After discussing microsoft/onnxruntime#15021
with Microsoft engineers, replaced the LN workaround with a simpler
implementation.
In addition:
* To make test more robust add `allow_cnt_errors` to `validate_result`
* Add more documentation to clarify the purpose and methodology of the
ONNX export tests
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
---------
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Co-authored-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Relax dimension checks for fp8 exec (NVIDIA#106)
31a2c7b
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@vasunvidia@cyanguwa
Initial commit for fp8_transpose_dbias kernel
ef3cde4
Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
WIP: fix interfaces; compiles; runtime cudnn ragged offset desc error
d0e241a
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Improve PyTorch test harness (NVIDIA#102)
1ed8bae
* add layernorm1p fp8 test
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* combine tests for easy maintenance
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* using torch.autocast for AMP and check grad types
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for wgrad accumulation fusion
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* rename file
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Setup numerical tests + SAR
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for full activation recompute
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add tests for checkpoint load/store
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* TE vs framework numerical tests
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* fix ci
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* relax thresholds
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Publish nightly version of the documentation
210d8f2
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@timmoon10@cyanguwa
Use 4B vector loads/stores in cast-transpose kernel for small matrices (
978c2de
NVIDIA#101)
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Changed version to 0.8.0dev
334cc9d
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
tcherckez-nvidiaand others
added 25 commits
March 31, 2023 13:03
@tcherckez-nvidia@ksivaman@cyanguwa
Fix FlashAttention tests (NVIDIA#99)
295ed0f
Signed-off-by: Tal Cherckez <tcherckez@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup setup.py
2971eba
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn handle creation out of bprop/bprop; runs; WIP
24885e6
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnnDestroy to pytorch extension
6e6ca3d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@nzmora-nvidia@cyanguwa
Change FP8 recipe defaults (NVIDIA#112)
a0592b3
* Change FP8 recipe defaults
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Increase default amax history length
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Always check history size
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* no amax history for onnx export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* revert onnx export test changes
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Fix indices in onnx test
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clean workspace size; remove bprop debug comments
b0e4a7f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn plan manager from pytorch/csrc to common/fused_attn
f72623c
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
simplify philox seed/offset extraction using one CUDA kernel
e1a89c3
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Fix segfault during onnx export (NVIDIA#126)
4178b39
* Fix segfault during GeLU export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
replace cu_seqlens with qkv_ragged_offset in fused_attn_fwd/bwd
46de93f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup comments from last 3 commits
49f85c2
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix coding style to pass lint; WIP
38bde38
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix fused_attn_fp8.cu for lint; success; compiles and runs correctly
9b06144
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'main' into fp8_flash_attn
d214dfc
Signed-off-by: cyanguwa <cyang.uwa@gmail.com>
@cyanguwa
further remove cudnn fused attn from transformer.py
4997939
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'fp8_flash_attn' of github.com:cyanguwa/TransformerEngin…
a7f9417
…e into fp8_flash_attn
@cyanguwa
remove certain transformer module changes to focus this PR on cpp_ext…
4685a7d
…ensions
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
remove duplicate arch checks in fp8 kernels
2f73f87
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
further fix coding style to pass lint for Python
a6c090e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix indents, commenting; remove total_seqs in some fwd/bwd calls
c76892e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
modify setup.py to accept external include/lib paths for cuda/cudnn/c…
28d3e93
…udnn_frontend
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
revert to cu_seqlens from qkv_ragged_offset in fwd/bwd api
1297a3e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
reorganize ops in cudnn graph
4dc0eb0
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix last commit and remove dependency on cudnn_all
e508591
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cuDNN path hints for cmake
5660e72
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx
ptrendx
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Apr 17, 2023

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Requires NVIDIA/cudnn-frontend#44
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cyanguwa
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Apr 17, 2023

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Replaced by PR #155.
@cyanguwa
cyanguwa
deleted the

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February 22, 2024 00:15
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[WIP] Add Fused Attention for FP8 by cyanguwa · Pull Request #128 · NVIDIA/TransformerEngine · GitHub
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[WIP] Add Fused Attention for FP8 - #128
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cyanguwa:fp8_flash_attn
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[WIP] Add Fused Attention for FP8#128
cyanguwa wants to merge 80 commits into
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cyanguwa:fp8_flash_attn
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Apr 3, 2023

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 No description provided. 
ptrendxand others
added 30 commits
March 31, 2023 12:59
@ptrendx@cyanguwa
Add people to TE CI
0f0370b
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Fix the link to the documentation archives (NVIDIA#91)
94ee69a
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
deprecate qk layer scaling and fp32 softmax args (NVIDIA#90)
e385666
* deprecate qk layer scaling and fp32 softmax args
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* apply QK layer scaling for fp16 training
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Move from Sphinx Autodoc to sphinx-autoapi (NVIDIA#92)
0cb784a
* Change from AutoDoc to AutoAPI
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fixes
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* WAR for the wrong autosummary generation
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* Change common to be in line with pytorch API docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Add GitHub Action to build docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fix
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Trying to fix the versions
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
---------
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnn_fmha_fp8 module and extensions call; compile sucessfully
0bd7b24
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add python/pytorch calls to c++ funcs; fix fp8/fp16/bf16 branching lo…
833bf92
…cation in .cu; compile successfully
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add simple test; unsuccessful run
f8c98b9
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clear up file/func names; create pytorch modules/DPA calls; WIP
6b6399d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update PyTorch modules; compiles; WIP
e466b66
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Raise autocast usage error (NVIDIA#93)
f8fe0ee
* catch incorrect usage of fp8_autocast
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* catch error on first time double execution
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Catch FP8 modulo16 error before cublas and fp8 kernels (NVIDIA#97)
022bea6
* Catch FP8 modulo16 error before cublas and fp8 kernels
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* annotate
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding documents to TE/JAX (NVIDIA#87)
570ac8c
* Updated TE/JAX docs
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adding TE/JAX docs' rst files
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Set DType as pybind11::module_local() to avoid generic_type errors.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Updating license and exporting more modules
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adopting autoapi and removing enum_tools.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Fix typo
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Make jax.rst be style consistent.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from code review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Update the description of Softmax
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Removed categories in catalog as PyTorch
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming Huang <mingh@nvidia.com>
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
still fprop only; replace R
cf48483
CP with RECIPROCAL and update cudnn_frontend version
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update fprop and add bprop (uncomplte); add cudnn plan caching; compiles
fdaa2d8
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace logic (WIP)
6849d6b
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Update PyTorch comm API (NVIDIA#100)
f45d545
Use updated comm API PyTorch
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update the interface of fwd calls; consistent with mlperf; compiles
6eaa7b4
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox state component of the code
5efae6f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox by using tensor adds/concats
5c87b1d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace calculation and its return for allocateSpace
c8cb301
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding JAX to README.rst (NVIDIA#98)
e3b825f
* Adding JAX to README.rst
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine README.rst as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine the API doc of extend_logical_axis_rules.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add bprop sample to cudnn fmha fp8 and create pytorch extension; comp…
7c1e2b5
…iles
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@nzmora-nvidia@timmoon10@cyanguwa
Add a temporary workaround to layernorm ONNX export (NVIDIA#95)
b1e077c
* Add a temporary workaround to layernorm export
Seems like ORT is performing template-matching for LN and incorrectly concludes
that it doesn't have a kernel for FP32 LN. The work-around adds the addition of
fake_zero which is meant to prevent the template matching while keeping the graph
virtually unchanged. This also requires `do_constant_folding=False` in
`torch.onnx.export`.
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Adjust test threshold
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Opened an ORT bug and added the link for tracking
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix Python linter errors
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Simplify the LN workaround solution (ONNX export)
After discussing microsoft/onnxruntime#15021
with Microsoft engineers, replaced the LN workaround with a simpler
implementation.
In addition:
* To make test more robust add `allow_cnt_errors` to `validate_result`
* Add more documentation to clarify the purpose and methodology of the
ONNX export tests
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
---------
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Co-authored-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Relax dimension checks for fp8 exec (NVIDIA#106)
31a2c7b
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@vasunvidia@cyanguwa
Initial commit for fp8_transpose_dbias kernel
ef3cde4
Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
WIP: fix interfaces; compiles; runtime cudnn ragged offset desc error
d0e241a
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Improve PyTorch test harness (NVIDIA#102)
1ed8bae
* add layernorm1p fp8 test
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* combine tests for easy maintenance
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* using torch.autocast for AMP and check grad types
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for wgrad accumulation fusion
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* rename file
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Setup numerical tests + SAR
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for full activation recompute
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add tests for checkpoint load/store
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* TE vs framework numerical tests
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* fix ci
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* relax thresholds
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Publish nightly version of the documentation
210d8f2
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@timmoon10@cyanguwa
Use 4B vector loads/stores in cast-transpose kernel for small matrices (
978c2de
NVIDIA#101)
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Changed version to 0.8.0dev
334cc9d
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
tcherckez-nvidiaand others
added 25 commits
March 31, 2023 13:03
@tcherckez-nvidia@ksivaman@cyanguwa
Fix FlashAttention tests (NVIDIA#99)
295ed0f
Signed-off-by: Tal Cherckez <tcherckez@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup setup.py
2971eba
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn handle creation out of bprop/bprop; runs; WIP
24885e6
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnnDestroy to pytorch extension
6e6ca3d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@nzmora-nvidia@cyanguwa
Change FP8 recipe defaults (NVIDIA#112)
a0592b3
* Change FP8 recipe defaults
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Increase default amax history length
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Always check history size
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* no amax history for onnx export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* revert onnx export test changes
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Fix indices in onnx test
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clean workspace size; remove bprop debug comments
b0e4a7f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn plan manager from pytorch/csrc to common/fused_attn
f72623c
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
simplify philox seed/offset extraction using one CUDA kernel
e1a89c3
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Fix segfault during onnx export (NVIDIA#126)
4178b39
* Fix segfault during GeLU export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
replace cu_seqlens with qkv_ragged_offset in fused_attn_fwd/bwd
46de93f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup comments from last 3 commits
49f85c2
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix coding style to pass lint; WIP
38bde38
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix fused_attn_fp8.cu for lint; success; compiles and runs correctly
9b06144
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'main' into fp8_flash_attn
d214dfc
Signed-off-by: cyanguwa <cyang.uwa@gmail.com>
@cyanguwa
further remove cudnn fused attn from transformer.py
4997939
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'fp8_flash_attn' of github.com:cyanguwa/TransformerEngin…
a7f9417
…e into fp8_flash_attn
@cyanguwa
remove certain transformer module changes to focus this PR on cpp_ext…
4685a7d
…ensions
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
remove duplicate arch checks in fp8 kernels
2f73f87
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
further fix coding style to pass lint for Python
a6c090e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix indents, commenting; remove total_seqs in some fwd/bwd calls
c76892e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
modify setup.py to accept external include/lib paths for cuda/cudnn/c…
28d3e93
…udnn_frontend
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
revert to cu_seqlens from qkv_ragged_offset in fwd/bwd api
1297a3e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
reorganize ops in cudnn graph
4dc0eb0
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix last commit and remove dependency on cudnn_all
e508591
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cuDNN path hints for cmake
5660e72
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx
ptrendx
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Apr 17, 2023

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Requires NVIDIA/cudnn-frontend#44
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cyanguwa
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Apr 17, 2023

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Replaced by PR #155.
@cyanguwa
cyanguwa
deleted the

fp8_flash_attn

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February 22, 2024 00:15
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[WIP] Add Fused Attention for FP8 by cyanguwa · Pull Request #128 · NVIDIA/TransformerEngine · GitHub
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[WIP] Add Fused Attention for FP8 - #128
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NVIDIA:mainfrom 
cyanguwa:fp8_flash_attn
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[WIP] Add Fused Attention for FP8#128
cyanguwa wants to merge 80 commits into
NVIDIA:mainfrom 
cyanguwa:fp8_flash_attn
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@cyanguwa
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Apr 3, 2023

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 No description provided. 
ptrendxand others
added 30 commits
March 31, 2023 12:59
@ptrendx@cyanguwa
Add people to TE CI
0f0370b
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Fix the link to the documentation archives (NVIDIA#91)
94ee69a
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
deprecate qk layer scaling and fp32 softmax args (NVIDIA#90)
e385666
* deprecate qk layer scaling and fp32 softmax args
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* apply QK layer scaling for fp16 training
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Move from Sphinx Autodoc to sphinx-autoapi (NVIDIA#92)
0cb784a
* Change from AutoDoc to AutoAPI
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fixes
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* WAR for the wrong autosummary generation
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* Change common to be in line with pytorch API docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Add GitHub Action to build docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fix
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Trying to fix the versions
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
---------
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnn_fmha_fp8 module and extensions call; compile sucessfully
0bd7b24
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add python/pytorch calls to c++ funcs; fix fp8/fp16/bf16 branching lo…
833bf92
…cation in .cu; compile successfully
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add simple test; unsuccessful run
f8c98b9
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clear up file/func names; create pytorch modules/DPA calls; WIP
6b6399d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update PyTorch modules; compiles; WIP
e466b66
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Raise autocast usage error (NVIDIA#93)
f8fe0ee
* catch incorrect usage of fp8_autocast
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* catch error on first time double execution
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Catch FP8 modulo16 error before cublas and fp8 kernels (NVIDIA#97)
022bea6
* Catch FP8 modulo16 error before cublas and fp8 kernels
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* annotate
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding documents to TE/JAX (NVIDIA#87)
570ac8c
* Updated TE/JAX docs
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adding TE/JAX docs' rst files
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Set DType as pybind11::module_local() to avoid generic_type errors.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Updating license and exporting more modules
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adopting autoapi and removing enum_tools.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Fix typo
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Make jax.rst be style consistent.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from code review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Update the description of Softmax
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Removed categories in catalog as PyTorch
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming Huang <mingh@nvidia.com>
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
still fprop only; replace R
cf48483
CP with RECIPROCAL and update cudnn_frontend version
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update fprop and add bprop (uncomplte); add cudnn plan caching; compiles
fdaa2d8
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace logic (WIP)
6849d6b
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Update PyTorch comm API (NVIDIA#100)
f45d545
Use updated comm API PyTorch
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update the interface of fwd calls; consistent with mlperf; compiles
6eaa7b4
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox state component of the code
5efae6f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox by using tensor adds/concats
5c87b1d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace calculation and its return for allocateSpace
c8cb301
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding JAX to README.rst (NVIDIA#98)
e3b825f
* Adding JAX to README.rst
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine README.rst as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine the API doc of extend_logical_axis_rules.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add bprop sample to cudnn fmha fp8 and create pytorch extension; comp…
7c1e2b5
…iles
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@nzmora-nvidia@timmoon10@cyanguwa
Add a temporary workaround to layernorm ONNX export (NVIDIA#95)
b1e077c
* Add a temporary workaround to layernorm export
Seems like ORT is performing template-matching for LN and incorrectly concludes
that it doesn't have a kernel for FP32 LN. The work-around adds the addition of
fake_zero which is meant to prevent the template matching while keeping the graph
virtually unchanged. This also requires `do_constant_folding=False` in
`torch.onnx.export`.
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Adjust test threshold
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Opened an ORT bug and added the link for tracking
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix Python linter errors
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Simplify the LN workaround solution (ONNX export)
After discussing microsoft/onnxruntime#15021
with Microsoft engineers, replaced the LN workaround with a simpler
implementation.
In addition:
* To make test more robust add `allow_cnt_errors` to `validate_result`
* Add more documentation to clarify the purpose and methodology of the
ONNX export tests
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
---------
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Co-authored-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Relax dimension checks for fp8 exec (NVIDIA#106)
31a2c7b
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@vasunvidia@cyanguwa
Initial commit for fp8_transpose_dbias kernel
ef3cde4
Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
WIP: fix interfaces; compiles; runtime cudnn ragged offset desc error
d0e241a
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Improve PyTorch test harness (NVIDIA#102)
1ed8bae
* add layernorm1p fp8 test
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* combine tests for easy maintenance
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* using torch.autocast for AMP and check grad types
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for wgrad accumulation fusion
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* rename file
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Setup numerical tests + SAR
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for full activation recompute
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add tests for checkpoint load/store
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* TE vs framework numerical tests
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* fix ci
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* relax thresholds
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Publish nightly version of the documentation
210d8f2
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@timmoon10@cyanguwa
Use 4B vector loads/stores in cast-transpose kernel for small matrices (
978c2de
NVIDIA#101)
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Changed version to 0.8.0dev
334cc9d
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
tcherckez-nvidiaand others
added 25 commits
March 31, 2023 13:03
@tcherckez-nvidia@ksivaman@cyanguwa
Fix FlashAttention tests (NVIDIA#99)
295ed0f
Signed-off-by: Tal Cherckez <tcherckez@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup setup.py
2971eba
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn handle creation out of bprop/bprop; runs; WIP
24885e6
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnnDestroy to pytorch extension
6e6ca3d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@nzmora-nvidia@cyanguwa
Change FP8 recipe defaults (NVIDIA#112)
a0592b3
* Change FP8 recipe defaults
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Increase default amax history length
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Always check history size
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* no amax history for onnx export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* revert onnx export test changes
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Fix indices in onnx test
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clean workspace size; remove bprop debug comments
b0e4a7f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn plan manager from pytorch/csrc to common/fused_attn
f72623c
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
simplify philox seed/offset extraction using one CUDA kernel
e1a89c3
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Fix segfault during onnx export (NVIDIA#126)
4178b39
* Fix segfault during GeLU export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
replace cu_seqlens with qkv_ragged_offset in fused_attn_fwd/bwd
46de93f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup comments from last 3 commits
49f85c2
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix coding style to pass lint; WIP
38bde38
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix fused_attn_fp8.cu for lint; success; compiles and runs correctly
9b06144
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'main' into fp8_flash_attn
d214dfc
Signed-off-by: cyanguwa <cyang.uwa@gmail.com>
@cyanguwa
further remove cudnn fused attn from transformer.py
4997939
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'fp8_flash_attn' of github.com:cyanguwa/TransformerEngin…
a7f9417
…e into fp8_flash_attn
@cyanguwa
remove certain transformer module changes to focus this PR on cpp_ext…
4685a7d
…ensions
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
remove duplicate arch checks in fp8 kernels
2f73f87
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
further fix coding style to pass lint for Python
a6c090e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix indents, commenting; remove total_seqs in some fwd/bwd calls
c76892e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
modify setup.py to accept external include/lib paths for cuda/cudnn/c…
28d3e93
…udnn_frontend
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
revert to cu_seqlens from qkv_ragged_offset in fwd/bwd api
1297a3e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
reorganize ops in cudnn graph
4dc0eb0
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix last commit and remove dependency on cudnn_all
e508591
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cuDNN path hints for cmake
5660e72
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx
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Apr 17, 2023

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Requires NVIDIA/cudnn-frontend#44
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Apr 17, 2023

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Replaced by PR #155.
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deleted the

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February 22, 2024 00:15
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@cyanguwa@ptrendx@ksivaman@mingxu1067@nzmora-nvidia@vasunvidia@timmoon10@trevor-m@jeng1220@tcherckez-nvidia

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[WIP] Add Fused Attention for FP8 by cyanguwa · Pull Request #128 · NVIDIA/TransformerEngine · GitHub
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[WIP] Add Fused Attention for FP8 - #128
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cyanguwa:fp8_flash_attn
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[WIP] Add Fused Attention for FP8#128
cyanguwa wants to merge 80 commits into
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cyanguwa:fp8_flash_attn
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Apr 3, 2023

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ptrendxand others
added 30 commits
March 31, 2023 12:59
@ptrendx@cyanguwa
Add people to TE CI
0f0370b
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Fix the link to the documentation archives (NVIDIA#91)
94ee69a
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
deprecate qk layer scaling and fp32 softmax args (NVIDIA#90)
e385666
* deprecate qk layer scaling and fp32 softmax args
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* apply QK layer scaling for fp16 training
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Move from Sphinx Autodoc to sphinx-autoapi (NVIDIA#92)
0cb784a
* Change from AutoDoc to AutoAPI
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fixes
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* WAR for the wrong autosummary generation
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* Change common to be in line with pytorch API docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Add GitHub Action to build docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fix
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Trying to fix the versions
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
---------
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnn_fmha_fp8 module and extensions call; compile sucessfully
0bd7b24
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add python/pytorch calls to c++ funcs; fix fp8/fp16/bf16 branching lo…
833bf92
…cation in .cu; compile successfully
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add simple test; unsuccessful run
f8c98b9
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clear up file/func names; create pytorch modules/DPA calls; WIP
6b6399d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update PyTorch modules; compiles; WIP
e466b66
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Raise autocast usage error (NVIDIA#93)
f8fe0ee
* catch incorrect usage of fp8_autocast
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* catch error on first time double execution
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Catch FP8 modulo16 error before cublas and fp8 kernels (NVIDIA#97)
022bea6
* Catch FP8 modulo16 error before cublas and fp8 kernels
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* annotate
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding documents to TE/JAX (NVIDIA#87)
570ac8c
* Updated TE/JAX docs
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adding TE/JAX docs' rst files
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Set DType as pybind11::module_local() to avoid generic_type errors.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Updating license and exporting more modules
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adopting autoapi and removing enum_tools.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Fix typo
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Make jax.rst be style consistent.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from code review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Update the description of Softmax
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Removed categories in catalog as PyTorch
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming Huang <mingh@nvidia.com>
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
still fprop only; replace R
cf48483
CP with RECIPROCAL and update cudnn_frontend version
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update fprop and add bprop (uncomplte); add cudnn plan caching; compiles
fdaa2d8
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace logic (WIP)
6849d6b
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Update PyTorch comm API (NVIDIA#100)
f45d545
Use updated comm API PyTorch
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update the interface of fwd calls; consistent with mlperf; compiles
6eaa7b4
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox state component of the code
5efae6f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox by using tensor adds/concats
5c87b1d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace calculation and its return for allocateSpace
c8cb301
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding JAX to README.rst (NVIDIA#98)
e3b825f
* Adding JAX to README.rst
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine README.rst as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine the API doc of extend_logical_axis_rules.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add bprop sample to cudnn fmha fp8 and create pytorch extension; comp…
7c1e2b5
…iles
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@nzmora-nvidia@timmoon10@cyanguwa
Add a temporary workaround to layernorm ONNX export (NVIDIA#95)
b1e077c
* Add a temporary workaround to layernorm export
Seems like ORT is performing template-matching for LN and incorrectly concludes
that it doesn't have a kernel for FP32 LN. The work-around adds the addition of
fake_zero which is meant to prevent the template matching while keeping the graph
virtually unchanged. This also requires `do_constant_folding=False` in
`torch.onnx.export`.
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Adjust test threshold
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Opened an ORT bug and added the link for tracking
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix Python linter errors
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Simplify the LN workaround solution (ONNX export)
After discussing microsoft/onnxruntime#15021
with Microsoft engineers, replaced the LN workaround with a simpler
implementation.
In addition:
* To make test more robust add `allow_cnt_errors` to `validate_result`
* Add more documentation to clarify the purpose and methodology of the
ONNX export tests
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
---------
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Co-authored-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Relax dimension checks for fp8 exec (NVIDIA#106)
31a2c7b
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@vasunvidia@cyanguwa
Initial commit for fp8_transpose_dbias kernel
ef3cde4
Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
WIP: fix interfaces; compiles; runtime cudnn ragged offset desc error
d0e241a
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Improve PyTorch test harness (NVIDIA#102)
1ed8bae
* add layernorm1p fp8 test
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* combine tests for easy maintenance
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* using torch.autocast for AMP and check grad types
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for wgrad accumulation fusion
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* rename file
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Setup numerical tests + SAR
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for full activation recompute
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add tests for checkpoint load/store
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* TE vs framework numerical tests
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* fix ci
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* relax thresholds
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Publish nightly version of the documentation
210d8f2
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@timmoon10@cyanguwa
Use 4B vector loads/stores in cast-transpose kernel for small matrices (
978c2de
NVIDIA#101)
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Changed version to 0.8.0dev
334cc9d
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
tcherckez-nvidiaand others
added 25 commits
March 31, 2023 13:03
@tcherckez-nvidia@ksivaman@cyanguwa
Fix FlashAttention tests (NVIDIA#99)
295ed0f
Signed-off-by: Tal Cherckez <tcherckez@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup setup.py
2971eba
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn handle creation out of bprop/bprop; runs; WIP
24885e6
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnnDestroy to pytorch extension
6e6ca3d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@nzmora-nvidia@cyanguwa
Change FP8 recipe defaults (NVIDIA#112)
a0592b3
* Change FP8 recipe defaults
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Increase default amax history length
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Always check history size
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* no amax history for onnx export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* revert onnx export test changes
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Fix indices in onnx test
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clean workspace size; remove bprop debug comments
b0e4a7f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn plan manager from pytorch/csrc to common/fused_attn
f72623c
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
simplify philox seed/offset extraction using one CUDA kernel
e1a89c3
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Fix segfault during onnx export (NVIDIA#126)
4178b39
* Fix segfault during GeLU export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
replace cu_seqlens with qkv_ragged_offset in fused_attn_fwd/bwd
46de93f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup comments from last 3 commits
49f85c2
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix coding style to pass lint; WIP
38bde38
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix fused_attn_fp8.cu for lint; success; compiles and runs correctly
9b06144
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'main' into fp8_flash_attn
d214dfc
Signed-off-by: cyanguwa <cyang.uwa@gmail.com>
@cyanguwa
further remove cudnn fused attn from transformer.py
4997939
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'fp8_flash_attn' of github.com:cyanguwa/TransformerEngin…
a7f9417
…e into fp8_flash_attn
@cyanguwa
remove certain transformer module changes to focus this PR on cpp_ext…
4685a7d
…ensions
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
remove duplicate arch checks in fp8 kernels
2f73f87
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
further fix coding style to pass lint for Python
a6c090e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix indents, commenting; remove total_seqs in some fwd/bwd calls
c76892e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
modify setup.py to accept external include/lib paths for cuda/cudnn/c…
28d3e93
…udnn_frontend
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
revert to cu_seqlens from qkv_ragged_offset in fwd/bwd api
1297a3e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
reorganize ops in cudnn graph
4dc0eb0
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix last commit and remove dependency on cudnn_all
e508591
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cuDNN path hints for cmake
5660e72
Signed-off-by: Charlene Yang <charleney@nvidia.com>
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Apr 17, 2023

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Requires NVIDIA/cudnn-frontend#44
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Replaced by PR #155.
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February 22, 2024 00:15
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@cyanguwa@ptrendx@ksivaman@mingxu1067@nzmora-nvidia@vasunvidia@timmoon10@trevor-m@jeng1220@tcherckez-nvidia

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[WIP] Add Fused Attention for FP8 by cyanguwa · Pull Request #128 · NVIDIA/TransformerEngine · GitHub
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[WIP] Add Fused Attention for FP8 - #128
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cyanguwa:fp8_flash_attn
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[WIP] Add Fused Attention for FP8#128
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ptrendxand others
added 30 commits
March 31, 2023 12:59
@ptrendx@cyanguwa
Add people to TE CI
0f0370b
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Fix the link to the documentation archives (NVIDIA#91)
94ee69a
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
deprecate qk layer scaling and fp32 softmax args (NVIDIA#90)
e385666
* deprecate qk layer scaling and fp32 softmax args
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* apply QK layer scaling for fp16 training
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Move from Sphinx Autodoc to sphinx-autoapi (NVIDIA#92)
0cb784a
* Change from AutoDoc to AutoAPI
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fixes
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* WAR for the wrong autosummary generation
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* Change common to be in line with pytorch API docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Add GitHub Action to build docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fix
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Trying to fix the versions
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
---------
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnn_fmha_fp8 module and extensions call; compile sucessfully
0bd7b24
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add python/pytorch calls to c++ funcs; fix fp8/fp16/bf16 branching lo…
833bf92
…cation in .cu; compile successfully
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add simple test; unsuccessful run
f8c98b9
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clear up file/func names; create pytorch modules/DPA calls; WIP
6b6399d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update PyTorch modules; compiles; WIP
e466b66
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Raise autocast usage error (NVIDIA#93)
f8fe0ee
* catch incorrect usage of fp8_autocast
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* catch error on first time double execution
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Catch FP8 modulo16 error before cublas and fp8 kernels (NVIDIA#97)
022bea6
* Catch FP8 modulo16 error before cublas and fp8 kernels
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* annotate
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding documents to TE/JAX (NVIDIA#87)
570ac8c
* Updated TE/JAX docs
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adding TE/JAX docs' rst files
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Set DType as pybind11::module_local() to avoid generic_type errors.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Updating license and exporting more modules
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adopting autoapi and removing enum_tools.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Fix typo
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Make jax.rst be style consistent.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from code review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Update the description of Softmax
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Removed categories in catalog as PyTorch
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming Huang <mingh@nvidia.com>
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
still fprop only; replace R
cf48483
CP with RECIPROCAL and update cudnn_frontend version
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update fprop and add bprop (uncomplte); add cudnn plan caching; compiles
fdaa2d8
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace logic (WIP)
6849d6b
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Update PyTorch comm API (NVIDIA#100)
f45d545
Use updated comm API PyTorch
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update the interface of fwd calls; consistent with mlperf; compiles
6eaa7b4
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox state component of the code
5efae6f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox by using tensor adds/concats
5c87b1d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace calculation and its return for allocateSpace
c8cb301
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding JAX to README.rst (NVIDIA#98)
e3b825f
* Adding JAX to README.rst
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine README.rst as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine the API doc of extend_logical_axis_rules.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add bprop sample to cudnn fmha fp8 and create pytorch extension; comp…
7c1e2b5
…iles
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@nzmora-nvidia@timmoon10@cyanguwa
Add a temporary workaround to layernorm ONNX export (NVIDIA#95)
b1e077c
* Add a temporary workaround to layernorm export
Seems like ORT is performing template-matching for LN and incorrectly concludes
that it doesn't have a kernel for FP32 LN. The work-around adds the addition of
fake_zero which is meant to prevent the template matching while keeping the graph
virtually unchanged. This also requires `do_constant_folding=False` in
`torch.onnx.export`.
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Adjust test threshold
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Opened an ORT bug and added the link for tracking
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix Python linter errors
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Simplify the LN workaround solution (ONNX export)
After discussing microsoft/onnxruntime#15021
with Microsoft engineers, replaced the LN workaround with a simpler
implementation.
In addition:
* To make test more robust add `allow_cnt_errors` to `validate_result`
* Add more documentation to clarify the purpose and methodology of the
ONNX export tests
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
---------
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Co-authored-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Relax dimension checks for fp8 exec (NVIDIA#106)
31a2c7b
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@vasunvidia@cyanguwa
Initial commit for fp8_transpose_dbias kernel
ef3cde4
Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
WIP: fix interfaces; compiles; runtime cudnn ragged offset desc error
d0e241a
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Improve PyTorch test harness (NVIDIA#102)
1ed8bae
* add layernorm1p fp8 test
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* combine tests for easy maintenance
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* using torch.autocast for AMP and check grad types
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for wgrad accumulation fusion
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* rename file
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Setup numerical tests + SAR
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for full activation recompute
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add tests for checkpoint load/store
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* TE vs framework numerical tests
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* fix ci
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* relax thresholds
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Publish nightly version of the documentation
210d8f2
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@timmoon10@cyanguwa
Use 4B vector loads/stores in cast-transpose kernel for small matrices (
978c2de
NVIDIA#101)
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Changed version to 0.8.0dev
334cc9d
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
tcherckez-nvidiaand others
added 25 commits
March 31, 2023 13:03
@tcherckez-nvidia@ksivaman@cyanguwa
Fix FlashAttention tests (NVIDIA#99)
295ed0f
Signed-off-by: Tal Cherckez <tcherckez@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup setup.py
2971eba
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn handle creation out of bprop/bprop; runs; WIP
24885e6
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnnDestroy to pytorch extension
6e6ca3d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@nzmora-nvidia@cyanguwa
Change FP8 recipe defaults (NVIDIA#112)
a0592b3
* Change FP8 recipe defaults
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Increase default amax history length
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Always check history size
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* no amax history for onnx export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* revert onnx export test changes
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Fix indices in onnx test
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clean workspace size; remove bprop debug comments
b0e4a7f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn plan manager from pytorch/csrc to common/fused_attn
f72623c
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
simplify philox seed/offset extraction using one CUDA kernel
e1a89c3
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Fix segfault during onnx export (NVIDIA#126)
4178b39
* Fix segfault during GeLU export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
replace cu_seqlens with qkv_ragged_offset in fused_attn_fwd/bwd
46de93f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup comments from last 3 commits
49f85c2
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix coding style to pass lint; WIP
38bde38
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix fused_attn_fp8.cu for lint; success; compiles and runs correctly
9b06144
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'main' into fp8_flash_attn
d214dfc
Signed-off-by: cyanguwa <cyang.uwa@gmail.com>
@cyanguwa
further remove cudnn fused attn from transformer.py
4997939
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'fp8_flash_attn' of github.com:cyanguwa/TransformerEngin…
a7f9417
…e into fp8_flash_attn
@cyanguwa
remove certain transformer module changes to focus this PR on cpp_ext…
4685a7d
…ensions
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
remove duplicate arch checks in fp8 kernels
2f73f87
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
further fix coding style to pass lint for Python
a6c090e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix indents, commenting; remove total_seqs in some fwd/bwd calls
c76892e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
modify setup.py to accept external include/lib paths for cuda/cudnn/c…
28d3e93
…udnn_frontend
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
revert to cu_seqlens from qkv_ragged_offset in fwd/bwd api
1297a3e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
reorganize ops in cudnn graph
4dc0eb0
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix last commit and remove dependency on cudnn_all
e508591
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cuDNN path hints for cmake
5660e72
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx
ptrendx
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Apr 17, 2023

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Requires NVIDIA/cudnn-frontend#44
@cyanguwa
cyanguwa
commented
Apr 17, 2023

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CollaboratorAuthor
Replaced by PR #155.
@cyanguwa
cyanguwa
deleted the

fp8_flash_attn

branch
February 22, 2024 00:15
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@ksivamanksivamanAwaiting requested review from ksivamanksivaman will be requested when the pull request is marked ready for reviewksivaman is a code owner
@ptrendxptrendxAwaiting requested review from ptrendxptrendx will be requested when the pull request is marked ready for reviewptrendx is a code owner

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[WIP] Add Fused Attention for FP8 by cyanguwa · Pull Request #128 · NVIDIA/TransformerEngine · GitHub
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[WIP] Add Fused Attention for FP8 - #128
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cyanguwa:fp8_flash_attn
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[WIP] Add Fused Attention for FP8#128
cyanguwa wants to merge 80 commits into
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cyanguwa:fp8_flash_attn
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Apr 3, 2023

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ptrendxand others
added 30 commits
March 31, 2023 12:59
@ptrendx@cyanguwa
Add people to TE CI
0f0370b
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Fix the link to the documentation archives (NVIDIA#91)
94ee69a
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
deprecate qk layer scaling and fp32 softmax args (NVIDIA#90)
e385666
* deprecate qk layer scaling and fp32 softmax args
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* apply QK layer scaling for fp16 training
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Move from Sphinx Autodoc to sphinx-autoapi (NVIDIA#92)
0cb784a
* Change from AutoDoc to AutoAPI
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fixes
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* WAR for the wrong autosummary generation
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
* Change common to be in line with pytorch API docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Add GitHub Action to build docs
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Fix
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
* Trying to fix the versions
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
---------
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Przemyslaw Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnn_fmha_fp8 module and extensions call; compile sucessfully
0bd7b24
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add python/pytorch calls to c++ funcs; fix fp8/fp16/bf16 branching lo…
833bf92
…cation in .cu; compile successfully
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add simple test; unsuccessful run
f8c98b9
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clear up file/func names; create pytorch modules/DPA calls; WIP
6b6399d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update PyTorch modules; compiles; WIP
e466b66
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Raise autocast usage error (NVIDIA#93)
f8fe0ee
* catch incorrect usage of fp8_autocast
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* catch error on first time double execution
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Catch FP8 modulo16 error before cublas and fp8 kernels (NVIDIA#97)
022bea6
* Catch FP8 modulo16 error before cublas and fp8 kernels
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* annotate
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding documents to TE/JAX (NVIDIA#87)
570ac8c
* Updated TE/JAX docs
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adding TE/JAX docs' rst files
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Set DType as pybind11::module_local() to avoid generic_type errors.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Updating license and exporting more modules
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Adopting autoapi and removing enum_tools.
Signed-off-by: Ming Huang <mingh@nvidia.com>
* Fix typo
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Make jax.rst be style consistent.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Fixing doc statements as the suggestion from code review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Update the description of Softmax
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Removed categories in catalog as PyTorch
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming Huang <mingh@nvidia.com>
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
still fprop only; replace R
cf48483
CP with RECIPROCAL and update cudnn_frontend version
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update fprop and add bprop (uncomplte); add cudnn plan caching; compiles
fdaa2d8
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace logic (WIP)
6849d6b
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Update PyTorch comm API (NVIDIA#100)
f45d545
Use updated comm API PyTorch
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
update the interface of fwd calls; consistent with mlperf; compiles
6eaa7b4
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox state component of the code
5efae6f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix philox by using tensor adds/concats
5c87b1d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add workspace calculation and its return for allocateSpace
c8cb301
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@mingxu1067@ksivaman@cyanguwa
Adding JAX to README.rst (NVIDIA#98)
e3b825f
* Adding JAX to README.rst
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine README.rst as the suggestion from review.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
* Refine the API doc of extend_logical_axis_rules.
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
---------
Signed-off-by: Ming-Xu Huang <mingh@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add bprop sample to cudnn fmha fp8 and create pytorch extension; comp…
7c1e2b5
…iles
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@nzmora-nvidia@timmoon10@cyanguwa
Add a temporary workaround to layernorm ONNX export (NVIDIA#95)
b1e077c
* Add a temporary workaround to layernorm export
Seems like ORT is performing template-matching for LN and incorrectly concludes
that it doesn't have a kernel for FP32 LN. The work-around adds the addition of
fake_zero which is meant to prevent the template matching while keeping the graph
virtually unchanged. This also requires `do_constant_folding=False` in
`torch.onnx.export`.
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Adjust test threshold
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Opened an ORT bug and added the link for tracking
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix Python linter errors
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Simplify the LN workaround solution (ONNX export)
After discussing microsoft/onnxruntime#15021
with Microsoft engineers, replaced the LN workaround with a simpler
implementation.
In addition:
* To make test more robust add `allow_cnt_errors` to `validate_result`
* Add more documentation to clarify the purpose and methodology of the
ONNX export tests
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
* Fix unused import
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
---------
Signed-off-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Co-authored-by: Tim Moon <4406448+timmoon10@users.noreply.github.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Relax dimension checks for fp8 exec (NVIDIA#106)
31a2c7b
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@vasunvidia@cyanguwa
Initial commit for fp8_transpose_dbias kernel
ef3cde4
Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
WIP: fix interfaces; compiles; runtime cudnn ragged offset desc error
d0e241a
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Improve PyTorch test harness (NVIDIA#102)
1ed8bae
* add layernorm1p fp8 test
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* combine tests for easy maintenance
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* using torch.autocast for AMP and check grad types
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for wgrad accumulation fusion
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* rename file
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Setup numerical tests + SAR
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add test for full activation recompute
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Add tests for checkpoint load/store
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* TE vs framework numerical tests
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* fix ci
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* relax thresholds
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Publish nightly version of the documentation
210d8f2
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@timmoon10@cyanguwa
Use 4B vector loads/stores in cast-transpose kernel for small matrices (
978c2de
NVIDIA#101)
Signed-off-by: Tim Moon <tmoon@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx@cyanguwa
Changed version to 0.8.0dev
334cc9d
Signed-off-by: Przemek Tredak <ptredak@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
tcherckez-nvidiaand others
added 25 commits
March 31, 2023 13:03
@tcherckez-nvidia@ksivaman@cyanguwa
Fix FlashAttention tests (NVIDIA#99)
295ed0f
Signed-off-by: Tal Cherckez <tcherckez@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup setup.py
2971eba
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn handle creation out of bprop/bprop; runs; WIP
24885e6
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cudnnDestroy to pytorch extension
6e6ca3d
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@nzmora-nvidia@cyanguwa
Change FP8 recipe defaults (NVIDIA#112)
a0592b3
* Change FP8 recipe defaults
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Increase default amax history length
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Always check history size
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* no amax history for onnx export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* revert onnx export test changes
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* Fix indices in onnx test
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Neta Zmora <nzmora@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
clean workspace size; remove bprop debug comments
b0e4a7f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
move cudnn plan manager from pytorch/csrc to common/fused_attn
f72623c
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
simplify philox seed/offset extraction using one CUDA kernel
e1a89c3
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ksivaman@cyanguwa
Fix segfault during onnx export (NVIDIA#126)
4178b39
* Fix segfault during GeLU export
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
* address review comments
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
---------
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
replace cu_seqlens with qkv_ragged_offset in fused_attn_fwd/bwd
46de93f
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
cleanup comments from last 3 commits
49f85c2
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix coding style to pass lint; WIP
38bde38
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix fused_attn_fp8.cu for lint; success; compiles and runs correctly
9b06144
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'main' into fp8_flash_attn
d214dfc
Signed-off-by: cyanguwa <cyang.uwa@gmail.com>
@cyanguwa
further remove cudnn fused attn from transformer.py
4997939
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
Merge branch 'fp8_flash_attn' of github.com:cyanguwa/TransformerEngin…
a7f9417
…e into fp8_flash_attn
@cyanguwa
remove certain transformer module changes to focus this PR on cpp_ext…
4685a7d
…ensions
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
remove duplicate arch checks in fp8 kernels
2f73f87
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
further fix coding style to pass lint for Python
a6c090e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix indents, commenting; remove total_seqs in some fwd/bwd calls
c76892e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
modify setup.py to accept external include/lib paths for cuda/cudnn/c…
28d3e93
…udnn_frontend
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
revert to cu_seqlens from qkv_ragged_offset in fwd/bwd api
1297a3e
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
reorganize ops in cudnn graph
4dc0eb0
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
fix last commit and remove dependency on cudnn_all
e508591
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@cyanguwa
add cuDNN path hints for cmake
5660e72
Signed-off-by: Charlene Yang <charleney@nvidia.com>
@ptrendx
ptrendx
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Apr 17, 2023

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Requires NVIDIA/cudnn-frontend#44
@cyanguwa
cyanguwa
commented
Apr 17, 2023

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Replaced by PR #155.
@cyanguwa
cyanguwa
deleted the

fp8_flash_attn

branch
February 22, 2024 00:15
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@cyanguwa@ptrendx@ksivaman@mingxu1067@nzmora-nvidia@vasunvidia@timmoon10@trevor-m@jeng1220@tcherckez-nvidia