Micro Electronics Research Laboratory

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1. OpenTCAMOpenTCAMPublic

   An open-source Ternary Content Addressable Memory (TCAM) compiler.

   Python 37 15

2. azadi-socazadi-socPublic

   Azadi (Freedom) is a 32-bit RISC-V CPU based System on Chip.

   SystemVerilog 34 10

3. Google-Summer-of-CodeGoogle-Summer-of-CodePublic

   Project ideas list for Google Summer of Code.

   18 2

4. IbtidaIbtidaPublic

   A basic System on a Chip (SoC) based on the Buraq core for the Internet of Things (IoT).

   Verilog 6 2

5. TileLinkTileLinkPublic

   TileLink Uncached Lightweight (TL-UL) implementation on Chisel.

   Scala 25 11

6. buraq_miniburaq_miniPublic

   This repository contains the 5 stage pipelined CPU implemented on the RISC-V ISA and Chisel hardware construction language (HDL)

   Scala 11 6