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soc: ace: fix IPC D3 power state entry - #6440
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lgirdwood
commented
Oct 26, 2022
@aborisovich fyi - #6041 is now merged |
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96c4172Compareaborisovich
commented
Oct 27, 2022
Awaits full scope results please do not merge for now. |
5c53704 to
96c4172Comparelgirdwood
commented
Oct 27, 2022
@aborisovich Looks like CI is good, but pls ping when ready. |
aborisovich
commented
Nov 2, 2022
It fails all MTL tests as Zephyr Power Manager is not enabled. Waits for #6489 . |
kv2019i
commented
Nov 2, 2022
@aborisovich Please also check #6515 |
lgirdwood
commented
Nov 2, 2022
@aborisovich@kv2019i we are blocking on the CI update for the dependencies ... |
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fd35f52Compareaborisovich
commented
Nov 5, 2022
Internal Intel CI System/merge/build broken? |
Executed tests for MTL manually. Test load_fw_gracefull_shutdown passes now, but tests D3_master_core keep failing (however SetDx response is received and lack of it was the cause of this bug). |
lgirdwood
commented
Nov 7, 2022
@aborisovich both CI's are impacted by the 01.org server move. I hope to have it resolved today. |
aborisovich
commented
Dec 14, 2022
Do not merge please, looks like we have randomly failing HDA tests... |
kv2019i
commented
Dec 14, 2022
Ack, I added DNM to PR subject, please remove when resolved. |
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65f829eCompareaborisovich
commented
Dec 15, 2022
Improvement - |
lgirdwood
commented
Dec 15, 2022
@aborisovich can you check CI, not sure if we are testing this case today on MTL. |
aborisovich
commented
Dec 15, 2022
I've asked validation team yesterday to add two more tests related to D3 - enter D3 with and without power gating. |
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Discovered bug cause - we do not have implemented device reinitialization (context restore) after boot from IMR what causes FW to idle after waking up from D3 state and not responding to IPCs. |
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2cf6b34Comparemarc-hb
commented
Dec 16, 2022
Switching this to a "draft" to make sure it does not get merged by accident while |
aborisovich
commented
Dec 18, 2022
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8a6af1bCompareaborisovich
commented
Dec 19, 2022
Fixed checkpatch. |
This patch fixes D3 issue - now platform enters and wakes up from D3 correctly on first iteration. This had been achieved using Zephyr cpu function call that redirects D3 flow to power down assembly code sending IPC response to host just before powering down. Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com> Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
8a6af1b to
e8ce842Compareaborisovich
commented
Dec 21, 2022
Still waiting for test results. |
PR can be merged now.
|
marc-hb
commented
Dec 21, 2022
https://sof-ci.01.org/sofpr/PR6440/build3143/devicetest/index.html looks pretty bad. |
aborisovich
commented
Dec 22, 2022
Well, rerun fixed the issue... |
ranj063
commented
Dec 22, 2022
yes, good to go! |

Fist commit
Patch fixes D3 issue - now platform enters and wakes up from D3 correctly.
It had been achieved using Zephyr cpu function call that redirects D3 flow to power down assembly code
sending IPC response to host just before powering down.
Second commitAdds pm notifiers to Zephyr power manager to allocate IMR memory inside SOF code in order to save LPSRAM and HPSRAM memory before powering down.Edit: dropped for now due to missing implementation of devices context restore.
zephyrproject-rtos/zephyr#53105 will be used instead to skip context restore for now.
It will be implemented soontm.
Requires:
Signed-off-by: Andrey Borisovich andrey.borisovich@intel.com
Signed-off-by: Marcin Szkudlinski marcin.szkudlinski@intel.com
Signed-off-by: Tomasz Leman tomasz.m.leman@intel.com