Cardinal NIC and Chip Multiprocessor
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Dec 1, 2021 - Verilog
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simvision
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grep for waveforms — read signal values, clock frequency, and transitions from Synopsys FSDB, Cadence SST2, and open VCD dumps, straight from the shell. Deterministic output, runs locally, no viewer. CLI + MCP server + Claude Code skill.
climcpwaveformedaverilogsystemveriloggtkwaveuvmvcdverdiai-agentsfsdbdesign-verificationxceliumsimvisionsst2llmrtl-simulationclaude-codeclaude-code-skill
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Sep 8, 2026 - Python
UVM-based verification of a coincident decoding digital design using SystemVerilog, including functional checking, coverage analysis with IMC, and waveform debugging with SimVision.
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Dec 13, 2025 - JavaScript
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