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Chrome DUT based on tgl_max98373_rt5682: override tplg and quirk data - #2345

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sathya-nujella:amp_ssp2_tplg_override_chrome
Aug 13, 2020
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Chrome DUT based on tgl_max98373_rt5682: override tplg and quirk data#2345
plbossart merged 2 commits into
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sathya-nujella:amp_ssp2_tplg_override_chrome

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@sathya-nujella

@sathya-nujellasathya-nujella commented Aug 5, 2020

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Chrome DUT based on tgl_max98373_rt5682: override tplg and quirk data

Below changes are done here:

1)Machine driver's platform data has a copy of acpi mach data.
So, override tplg info on this platform data and use this tplg info
while loading tplg binary. Updated sof pcm.c accordingly.

  1. A Chrome System based on tgl_max98373_rt5682 has different SSP and tplg
    configurations. Using DMI data of this variant DUT, overiride
    quirk and tplg information.

@ranj063

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@dbaluta how would this change affect you?

Comment threadsound/soc/sof/pcm.c Outdated
Comment threadsound/soc/intel/boards/sof_rt5682.c
Comment threadsound/soc/intel/boards/sof_rt5682.c Outdated
Comment threadsound/soc/intel/boards/sof_rt5682.c Outdated
@sathya-nujella
sathya-nujellaforce-pushed the amp_ssp2_tplg_override_chrome branch from 7064584 to cc98e78CompareAugust 10, 2020 01:32
@sathya-nujella
sathya-nujellaforce-pushed the amp_ssp2_tplg_override_chrome branch from cc98e78 to 78ecc07CompareAugust 10, 2020 06:40

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The change looks ok, but the topology names doesn't seem so good. I'd really like us to follow the previous convention with rt5682 first followed by the amplifier name.

Comment threadsound/soc/sof/sof-pci-dev.c Outdated
@sathya-nujella
sathya-nujellaforce-pushed the amp_ssp2_tplg_override_chrome branch from 78ecc07 to 4dde2e5CompareAugust 10, 2020 15:44
plbossart
plbossart previously approved these changes Aug 10, 2020

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LGTM, but can you also send a PR to change the topology names for rt5682-max98373 in sound/soc/intel/common and also in SOF tools/topology/CMakefile

Thanks @sathya-nujella

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SOFCI TEST

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@sathya-nujella I was talking about a simple change like this:

diff --git a/sound/soc/intel/common/soc-acpi-intel-tgl-match.c b/sound/soc/intel/common/soc-acpi-intel-tgl-match.c
index 6816847bee40..355a6d8ac175 100644
--- a/sound/soc/intel/common/soc-acpi-intel-tgl-match.c+++ b/sound/soc/intel/common/soc-acpi-intel-tgl-match.c@@ -261,19 +261,19 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
},
{
.id = "10EC5682",
- .drv_name = "tgl_max98357a_rt5682",+ .drv_name = "tgl_rt5682_max98357a",
.machine_quirk = snd_soc_acpi_codec_list,
.quirk_data = &tgl_codecs,
.sof_fw_filename = "sof-tgl.ri",
- .sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",+ .sof_tplg_filename = "sof-tgl-rt5682-max98357a.tplg",
},
{
.id = "10EC5682",
- .drv_name = "tgl_max98373_rt5682",+ .drv_name = "tgl_rt5682_max98373",
.machine_quirk = snd_soc_acpi_codec_list,
.quirk_data = &tgl_max98373_amp,
.sof_fw_filename = "sof-tgl.ri",
- .sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",+ .sof_tplg_filename = "sof-tgl-rt5682-max98373.tplg",
},
{},
};
@@ -319,7 +319,7 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
.links = tgl_chromebook_base,
.drv_name = "sof_sdw",
.sof_fw_filename = "sof-tgl.ri",
- .sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",+ .sof_tplg_filename = "sof-tgl-sdw-rt5682-max98373.tplg",
},
{
.link_mask = 0x1, /* this will only enable rt5682 for now */

@sathya-nujella

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LGTM, but can you also send a PR to change the topology names for rt5682-max98373 in sound/soc/intel/common and also in SOF tools/topology/CMakefile

Thanks @sathya-nujella

sure @plbossart , I will do.

@sathya-nujella

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@sathya-nujella I was talking about a simple change like this:

diff --git a/sound/soc/intel/common/soc-acpi-intel-tgl-match.c b/sound/soc/intel/common/soc-acpi-intel-tgl-match.c
index 6816847bee40..355a6d8ac175 100644
--- a/sound/soc/intel/common/soc-acpi-intel-tgl-match.c+++ b/sound/soc/intel/common/soc-acpi-intel-tgl-match.c@@ -261,19 +261,19 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
},
{
.id = "10EC5682",
- .drv_name = "tgl_max98357a_rt5682",+ .drv_name = "tgl_rt5682_max98357a",
.machine_quirk = snd_soc_acpi_codec_list,
.quirk_data = &tgl_codecs,
.sof_fw_filename = "sof-tgl.ri",
- .sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",+ .sof_tplg_filename = "sof-tgl-rt5682-max98357a.tplg",
},
{
.id = "10EC5682",
- .drv_name = "tgl_max98373_rt5682",+ .drv_name = "tgl_rt5682_max98373",
.machine_quirk = snd_soc_acpi_codec_list,
.quirk_data = &tgl_max98373_amp,
.sof_fw_filename = "sof-tgl.ri",
- .sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",+ .sof_tplg_filename = "sof-tgl-rt5682-max98373.tplg",
},
{},
};
@@ -319,7 +319,7 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
.links = tgl_chromebook_base,
.drv_name = "sof_sdw",
.sof_fw_filename = "sof-tgl.ri",
- .sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",+ .sof_tplg_filename = "sof-tgl-sdw-rt5682-max98373.tplg",
},
{
.link_mask = 0x1, /* this will only enable rt5682 for now */

Sure @plbossart , understood. I will do in a separate PR. Thanks!

ranj063
ranj063 previously approved these changes Aug 10, 2020
Comment threadsound/soc/sof/sof-pci-dev.c Outdated
@sathya-nujella
sathya-nujella dismissed stale reviews from ranj063 and plbossart via 0a7d96dAugust 11, 2020 06:07
@sathya-nujella
sathya-nujellaforce-pushed the amp_ssp2_tplg_override_chrome branch 2 times, most recently from 0a7d96d to 9251b90CompareAugust 12, 2020 02:42
@sathya-nujella

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rebased on top of latest sof-dev

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sorry, I should have noticed these before :-(

Comment threadsound/soc/sof/sof-pci-dev.c Outdated
Comment threadsound/soc/sof/sof-pci-dev.c Outdated
@sathya-nujella
sathya-nujellaforce-pushed the amp_ssp2_tplg_override_chrome branch from 9251b90 to 86a9705CompareAugust 12, 2020 17:08
@sathya-nujella

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sorry, I should have noticed these before :-(

np thank you for inputs.

plbossart
plbossart previously approved these changes Aug 12, 2020
Comment threadsound/soc/intel/boards/sof_rt5682.c
A Chrome System based on tgl_max98373_rt5682 has different SSP interface
configurations. Using DMI data of this variant DUT, override quirk
data.
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
Add tplg file override based on system DMI data matching.
Based on DMI match, update tplg_filename in sof_pdata.
In ACPI based systems:
tplg_file name is assigned in acpi mach table.
Do not update sof_pdata->tplg_filename from mach->sof_tplg_filename.
This way, tplg_filename provided via dmi table will be loaded in system.
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>

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Thanks for addressing the comments!

@plbossart
plbossart merged commit 20d59b1 into thesofproject:topic/sof-devAug 13, 2020
oder-chiou pushed a commit to oder-chiou/linux-soundwire that referenced this pull request May 5, 2026
…format
For incoming SCO connection with transparent coding format, alt setting
of CVSD is getting applied instead of Transparent.
Before fix:
< HCI Command: Accept Synchron.. (0x01|0x0029) plen 21 thesofproject#2196 [hci0] 321.342548
Address: 1C:CC:D6:E2:EA:80 (Xiaomi Communications Co Ltd)
Transmit bandwidth: 8000
Receive bandwidth: 8000
Max latency: 13
Setting: 0x0003
Input Coding: Linear
Input Data Format: 1's complement
Input Sample Size: 8-bit
# of bits padding at MSB: 0
Air Coding Format: Transparent Data
Retransmission effort: Optimize for link quality (0x02)
Packet type: 0x003f
HV1 may be used
HV2 may be used
HV3 may be used
EV3 may be used
EV4 may be used
EV5 may be used
> HCI Event: Command Status (0x0f) plen 4 thesofproject#2197 [hci0] 321.343585
Accept Synchronous Connection Request (0x01|0x0029) ncmd 1
Status: Success (0x00)
> HCI Event: Synchronous Connect Comp.. (0x2c) plen 17 thesofproject#2198 [hci0] 321.351666
Status: Success (0x00)
Handle: 257
Address: 1C:CC:D6:E2:EA:80 (Xiaomi Communications Co Ltd)
Link type: eSCO (0x02)
Transmission interval: 0x0c
Retransmission window: 0x04
RX packet length: 60
TX packet length: 60
Air mode: Transparent (0x03)
........
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2336 [hci0] 321.383655
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#2337 [hci0] 321.389558
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2338 [hci0] 321.393615
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2339 [hci0] 321.393618
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2340 [hci0] 321.393618
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#2341 [hci0] 321.397070
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2342 [hci0] 321.403622
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2343 [hci0] 321.403625
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2344 [hci0] 321.403625
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2345 [hci0] 321.403625
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#2346 [hci0] 321.404569
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#2347 [hci0] 321.412091
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2348 [hci0] 321.413626
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2349 [hci0] 321.413630
> SCO Data RX: Handle 257 flags 0x00 dlen 48 thesofproject#2350 [hci0] 321.413630
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#2351 [hci0] 321.419674
After fix:
< HCI Command: Accept Synchronou.. (0x01|0x0029) plen 21 thesofproject#309 [hci0] 49.439693
Address: 1C:CC:D6:E2:EA:80 (Xiaomi Communications Co Ltd)
Transmit bandwidth: 8000
Receive bandwidth: 8000
Max latency: 13
Setting: 0x0003
Input Coding: Linear
Input Data Format: 1's complement
Input Sample Size: 8-bit
# of bits padding at MSB: 0
Air Coding Format: Transparent Data
Retransmission effort: Optimize for link quality (0x02)
Packet type: 0x003f
HV1 may be used
HV2 may be used
HV3 may be used
EV3 may be used
EV4 may be used
EV5 may be used
> HCI Event: Command Status (0x0f) plen 4 thesofproject#310 [hci0] 49.440308
Accept Synchronous Connection Request (0x01|0x0029) ncmd 1
Status: Success (0x00)
> HCI Event: Synchronous Connect Complete (0x2c) plen 17 thesofproject#311 [hci0] 49.449308
Status: Success (0x00)
Handle: 257
Address: 1C:CC:D6:E2:EA:80 (Xiaomi Communications Co Ltd)
Link type: eSCO (0x02)
Transmission interval: 0x0c
Retransmission window: 0x04
RX packet length: 60
TX packet length: 60
Air mode: Transparent (0x03)
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#312 [hci0] 49.450421
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#313 [hci0] 49.457927
> HCI Event: Max Slots Change (0x1b) plen 3 thesofproject#314 [hci0] 49.460345
Handle: 256
Max slots: 5
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#315 [hci0] 49.465453
> SCO Data RX: Handle 257 flags 0x00 dlen 60 thesofproject#316 [hci0] 49.470502
> SCO Data RX: Handle 257 flags 0x00 dlen 60 thesofproject#317 [hci0] 49.470519
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#318 [hci0] 49.472996
> SCO Data RX: Handle 257 flags 0x00 dlen 60 thesofproject#319 [hci0] 49.480412
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#320 [hci0] 49.480492
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#321 [hci0] 49.487989
> SCO Data RX: Handle 257 flags 0x00 dlen 60 thesofproject#322 [hci0] 49.490303
< SCO Data TX: Handle 257 flags 0x00 dlen 60 thesofproject#323 [hci0] 49.495496
> SCO Data RX: Handle 257 flags 0x00 dlen 60 thesofproject#324 [hci0] 49.500304
> SCO Data RX: Handle 257 flags 0x00 dlen 60 thesofproject#325 [hci0] 49.500311
Signed-off-by: Kiran K <kiran.k@intel.com>
Signed-off-by: Lokendra Singh <lokendra.singh@intel.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
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@sathya-nujella@ranj063@plbossart@dbaluta@lyakh